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Subject: Re: [Qemu-devel] [PATCH 05/13] target-openrisc: Remove TLB flush on
 exception
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To: Peter Maydell <peter.maydell@linaro.org>, Sebastian Macke <sebastian@macke.de>
Cc: openrisc@openrisc.net, openrisc@lists.opencores.org, QEMU Developers <qemu-devel@nongnu.org>, Ethan Hunt <proljc@gmail.com>

On 11/01/2013 11:58 AM, Peter Maydell wrote:
>> > What is included in the tb hash? The virtual pc + physical page + the
>> > tb_flags? Not the mmu_index?
> You're right that the mmu_index is not included in the tb hash.
> Does that mean that the CPU state which determines the
> mmu_index needs to be in the tb_flags? I'm not sure and it's
> not something I'd thought about before. Richard -- do you know?

Normally the supervisor/hypervisor/whatever bit(s) is present in
the tb_flags, and the mmu_index ought to be computed from that.

That said, what normally happens is that we re-use cpu_mmu_index,
which looks at env, which is technically wrong.  But there's an
assumption that the bits we're examining in env have been copied
to tb_flags, so the data is actually in sync.


r~