From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60102) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ViUrd-0005ju-NV for qemu-devel@nongnu.org; Mon, 18 Nov 2013 14:52:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ViUrV-0003ZT-5B for qemu-devel@nongnu.org; Mon, 18 Nov 2013 14:52:05 -0500 Received: from mail-pd0-x230.google.com ([2607:f8b0:400e:c02::230]:34058) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ViUrU-0003ZK-Th for qemu-devel@nongnu.org; Mon, 18 Nov 2013 14:51:57 -0500 Received: by mail-pd0-f176.google.com with SMTP id w10so4894181pde.35 for ; Mon, 18 Nov 2013 11:51:55 -0800 (PST) Sender: Richard Henderson Message-ID: <528A6FD3.6010303@twiddle.net> Date: Tue, 19 Nov 2013 05:51:47 +1000 From: Richard Henderson MIME-Version: 1.0 References: <1380242934-20953-1-git-send-email-agraf@suse.de> <1380242934-20953-15-git-send-email-agraf@suse.de> <5245CDB5.2000403@twiddle.net> <5289E8AD.2070902@linaro.org> <528A196E.9000107@linaro.org> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 14/60] AArch64: Add orr instruction emulation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Michael Matz , Claudio Fontana Cc: Peter Maydell , Alexander Graf , qemu-devel@nongnu.org, Dirk Mueller , Laurent Desnogues , Christoffer Dall On 11/18/2013 11:55 PM, Michael Matz wrote: >> > I think we need to either explicitly convert the tcg_shift to a >> > TCGv_i32, or we need to use an open coded version of the rotr_i64 that >> > inserts at (32 - n) instead of (64 - n) >> > >> > What do you think? > I think converting tcg_shift might eventually lead to better generated > code (if tcg is optmizing enough, now or in the future, haven't checked). Agreed. r~