Re: [Qemu-devel] [PULL 11/13] target-i386: forward CPUID cache leaves when -cpu host is used

[Peter Lieven <pl@kamp.de>]

On 19.11.2013 15:19, Paolo Bonzini wrote:
> Il 19/11/2013 15:17, Peter Lieven ha scritto:
>>> if ((*eax & 31) && cs->nr_cores > 1)
>> at which position exactly do you want to put this condition and take
>> which action?
> Just replace "if (cs->nr_cores > 1)" in the patch I posted, i.e. after the switch.
This seems to work. What is in bits 0..5 of eax?
What about the number of threads in count == 2?

I would still like to have at least an option to disable the passthru without
recompiling if other issues occur.

>
> Paolo
>
> -------------- 8< -----------------
>  From 781ff96e9d1eeacbd4ff588d4d3773351f14320b Mon Sep 17 00:00:00 2001
> From: Paolo Bonzini <pbonzini@redhat.com>
> Date: Tue, 19 Nov 2013 13:19:17 +0100
> Subject: [PATCH] target-i386: do not override nr_cores for "-cpu host"
>
> Commit 787aaf5 (target-i386: forward CPUID cache leaves when -cpu host is
> used, 2013-09-02) brings bits 31..26 of CPUID leaf 04h out of sync with
> the APIC IDs that QEMU reserves for each package.  This number must come
> from "-smp" options rather than from the host CPUID.
>
> It also turns out that this unsyncing makes Windows Server 2012R2 fail
> to boot.
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>   target-i386/cpu.c | 14 ++++++++------
>   1 file changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index 864c80e..8df6747 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -2086,14 +2086,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
>           /* cache info: needed for Core compatibility */
>           if (cpu->cache_info_passthrough) {
>               host_cpuid(index, count, eax, ebx, ecx, edx);
> -            break;
> -        }
> -        if (cs->nr_cores > 1) {
> -            *eax = (cs->nr_cores - 1) << 26;
> +            *eax &= ~0xFC000000;
>           } else {
>               *eax = 0;
> -        }
> -        switch (count) {
> +            switch (count) {
>               case 0: /* L1 dcache info */
>                   *eax |= CPUID_4_TYPE_DCACHE | \
>                           CPUID_4_LEVEL(1) | \
> @@ -2133,6 +2129,12 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
>                   *ecx = 0;
>                   *edx = 0;
>                   break;
> +            }
> +        }
> +
> +        /* We give out APIC IDs ourselves, so force bits 31..26 even for "-cpu host".  */
> +        if ((*eax & 31) && cs->nr_cores > 1) {
> +            *eax |= (cs->nr_cores - 1) << 26;
>           }
>           break;
>       case 5:

Tested-by: Peter Lieven <pl@kamp.de>

Peter