From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57057) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VimZe-0000ek-0v for qemu-devel@nongnu.org; Tue, 19 Nov 2013 09:46:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VimZX-0006Ao-TC for qemu-devel@nongnu.org; Tue, 19 Nov 2013 09:46:41 -0500 Received: from mx.ipv6.kamp.de ([2a02:248:0:51::16]:49184 helo=mx01.kamp.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VimZX-00069R-I3 for qemu-devel@nongnu.org; Tue, 19 Nov 2013 09:46:35 -0500 Message-ID: <528B79CA.7080109@kamp.de> Date: Tue, 19 Nov 2013 15:46:34 +0100 From: Peter Lieven MIME-Version: 1.0 References: <1379694292-1601-1-git-send-email-pbonzini@redhat.com> <1379694292-1601-12-git-send-email-pbonzini@redhat.com> <528A310A.60607@dlhnet.de> <528A3422.1030701@kamp.de> <528A3C4A.4090001@redhat.com> <528B3C86.3030309@kamp.de> <528B41A5.1080504@redhat.com> <528B53A6.3030204@kamp.de> <528B561C.9070200@redhat.com> <528B5A5B.1090705@kamp.de> <528B65E6.7040203@redhat.com> <528B7190.1060009@kamp.de> <528B7262.1010909@redhat.com> <528B7303.3070204@kamp.de> <528B738B.8080805@redhat.com> In-Reply-To: <528B738B.8080805@redhat.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PULL 11/13] target-i386: forward CPUID cache leaves when -cpu host is used List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: qemu-devel@nongnu.org, Anthony Liguori , =?UTF-8?B?QmVub8OudCBDYW5ldA==?= On 19.11.2013 15:19, Paolo Bonzini wrote: > Il 19/11/2013 15:17, Peter Lieven ha scritto: >>> if ((*eax & 31) && cs->nr_cores > 1) >> at which position exactly do you want to put this condition and take >> which action? > Just replace "if (cs->nr_cores > 1)" in the patch I posted, i.e. after the switch. This seems to work. What is in bits 0..5 of eax? What about the number of threads in count == 2? I would still like to have at least an option to disable the passthru without recompiling if other issues occur. > > Paolo > > -------------- 8< ----------------- > From 781ff96e9d1eeacbd4ff588d4d3773351f14320b Mon Sep 17 00:00:00 2001 > From: Paolo Bonzini > Date: Tue, 19 Nov 2013 13:19:17 +0100 > Subject: [PATCH] target-i386: do not override nr_cores for "-cpu host" > > Commit 787aaf5 (target-i386: forward CPUID cache leaves when -cpu host is > used, 2013-09-02) brings bits 31..26 of CPUID leaf 04h out of sync with > the APIC IDs that QEMU reserves for each package. This number must come > from "-smp" options rather than from the host CPUID. > > It also turns out that this unsyncing makes Windows Server 2012R2 fail > to boot. > > Signed-off-by: Paolo Bonzini > --- > target-i386/cpu.c | 14 ++++++++------ > 1 file changed, 8 insertions(+), 6 deletions(-) > > diff --git a/target-i386/cpu.c b/target-i386/cpu.c > index 864c80e..8df6747 100644 > --- a/target-i386/cpu.c > +++ b/target-i386/cpu.c > @@ -2086,14 +2086,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, > /* cache info: needed for Core compatibility */ > if (cpu->cache_info_passthrough) { > host_cpuid(index, count, eax, ebx, ecx, edx); > - break; > - } > - if (cs->nr_cores > 1) { > - *eax = (cs->nr_cores - 1) << 26; > + *eax &= ~0xFC000000; > } else { > *eax = 0; > - } > - switch (count) { > + switch (count) { > case 0: /* L1 dcache info */ > *eax |= CPUID_4_TYPE_DCACHE | \ > CPUID_4_LEVEL(1) | \ > @@ -2133,6 +2129,12 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, > *ecx = 0; > *edx = 0; > break; > + } > + } > + > + /* We give out APIC IDs ourselves, so force bits 31..26 even for "-cpu host". */ > + if ((*eax & 31) && cs->nr_cores > 1) { > + *eax |= (cs->nr_cores - 1) << 26; > } > break; > case 5: Tested-by: Peter Lieven Peter