From: Li Guang <lig.fnst@cn.fujitsu.com>
To: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v4 2/4] hw/intc: add sunxi interrupt controller device
Date: Wed, 27 Nov 2013 13:44:13 +0800 [thread overview]
Message-ID: <529586AD.3050309@cn.fujitsu.com> (raw)
In-Reply-To: <CAEgOgz6D9wm-DyYDy_s9+FwxJmawM79v+rmve32TwL05P-BM1w@mail.gmail.com>
Peter Crosthwaite wrote:
> On Wed, Nov 27, 2013 at 1:36 PM, Li Guang<lig.fnst@cn.fujitsu.com> wrote:
>
>> Li Guang wrote:
>>
>>> Peter Crosthwaite wrote:
>>>
>>>> On Tue, Nov 26, 2013 at 5:22 PM, liguang<lig.fnst@cn.fujitsu.com> wrote:
>>>>
>>>>> Signed-off-by: liguang<lig.fnst@cn.fujitsu.com>
>>>>> ---
>>>>> default-configs/arm-softmmu.mak | 1 +
>>>>> hw/intc/Makefile.objs | 1 +
>>>>> hw/intc/sunxi-pic.c | 238
>>>>> +++++++++++++++++++++++++++++++++++++++
>>>>> include/hw/intc/sunxi-pic.h | 20 ++++
>>>>>
>
>>>>> +
>>>>> +static void sunxi_pic_set_irq(void *opaque, int irq, int level)
>>>>> +{
>>>>> + SunxiPICState *s = opaque;
>>>>> +
>>>>> + if (level) {
>>>>> + set_bit(irq, (void *)&s->irq_pending[irq/32]);
>>>>>
>>>> set_bit(irq % 32, ...)
>>>>
>>>>
>>> OK
>>>
>>
>> No, it is wrong,
>> irq/32 is right.
>>
>>
> The irq/32 is right I agree. This issue is the first arugment.
> Shouln't the whole thing be:
>
> set_bit(irq%32, (void *)&s->irq_pending[irq/32]);
>
>
>
OK, fix like this
diff --git a/hw/intc/sunxi-pic.c b/hw/intc/sunxi-pic.c
index 5fd86f9..ea75f84 100644
--- a/hw/intc/sunxi-pic.c
+++ b/hw/intc/sunxi-pic.c
@@ -77,7 +77,7 @@ static void sunxi_pic_set_irq(void *opaque, int irq,
int level)
SunxiPICState *s = opaque;
if (level) {
- set_bit(irq, (void *)&s->irq_pending[irq/32]);
+ set_bit(irq%32, (void *)&s->irq_pending[irq/32]);
}
sunxi_pic_update(s);
thanks!
Li Guang
next prev parent reply other threads:[~2013-11-27 6:00 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-26 7:22 [Qemu-devel] [PATCH v4 0/4] add sunxi machine type liguang
2013-11-26 7:22 ` [Qemu-devel] [PATCH v4 1/4] hw/timer: add sunxi timer device liguang
2013-11-26 8:40 ` Peter Crosthwaite
2013-11-26 8:59 ` Li Guang
2013-11-26 9:14 ` Peter Crosthwaite
2013-11-26 9:19 ` Li Guang
2013-11-26 9:25 ` Peter Crosthwaite
2013-11-26 7:22 ` [Qemu-devel] [PATCH v4 2/4] hw/intc: add sunxi interrupt controller device liguang
2013-11-26 9:02 ` Peter Crosthwaite
2013-11-26 9:11 ` Li Guang
2013-11-27 3:36 ` Li Guang
2013-11-27 5:31 ` Peter Crosthwaite
2013-11-27 5:44 ` Li Guang [this message]
2013-11-26 7:22 ` [Qemu-devel] [PATCH v4 3/4] hw/arm: add sunxi machine type liguang
2013-11-26 9:22 ` Peter Crosthwaite
2013-11-27 0:22 ` Li Guang
2013-11-27 9:22 ` Andreas Färber
2013-11-27 9:27 ` Andreas Färber
2013-11-29 0:46 ` Li Guang
2013-11-29 0:53 ` Peter Crosthwaite
2013-11-29 3:27 ` Andreas Färber
2013-11-29 8:06 ` Li Guang
2013-11-29 8:31 ` Peter Maydell
2013-11-29 8:49 ` Bamvor Jian Zhang
2013-11-29 13:51 ` Andreas Färber
2013-11-29 8:56 ` Li Guang
2013-11-29 9:11 ` Peter Maydell
2013-11-29 8:41 ` Bamvor Jian Zhang
2013-11-29 9:01 ` Li Guang
2013-11-29 13:04 ` Andreas Färber
2013-12-01 11:48 ` Peter Crosthwaite
2013-12-02 4:30 ` Li Guang
2013-11-26 7:22 ` [Qemu-devel] [PATCH v4 4/4] MAINTAINERS: add myself to maintain sunxi machine liguang
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