qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Laszlo Ersek <lersek@redhat.com>
To: Michael Roth <mdroth@linux.vnet.ibm.com>
Cc: "Jordan Justen (Intel address)" <jordan.l.justen@intel.com>,
	qemu-stable@nongnu.org, Gerd Hoffmann <kraxel@redhat.com>,
	qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v2] piix: fix 32bit pci hole
Date: Thu, 28 Nov 2013 17:03:39 +0100	[thread overview]
Message-ID: <5297695B.1010003@redhat.com> (raw)
In-Reply-To: <1385553451-1352-1-git-send-email-kraxel@redhat.com>

Mike,

On 11/27/13 12:57, Gerd Hoffmann wrote:
> Make the 32bit pci hole start at end of ram, so all possible address
> space is covered.  Of course the firmware can use less than that.
> Leaving space unused is no problem, mapping pci bars outside the
> hole causes problems though.
> 
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>  hw/pci-host/piix.c | 10 +---------
>  1 file changed, 1 insertion(+), 9 deletions(-)
> 
> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
> index edc974e..8e41ac1 100644
> --- a/hw/pci-host/piix.c
> +++ b/hw/pci-host/piix.c
> @@ -345,15 +345,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
>      f->ram_memory = ram_memory;
>  
>      i440fx = I440FX_PCI_HOST_BRIDGE(dev);
> -    /* Set PCI window size the way seabios has always done it. */
> -    /* Power of 2 so bios can cover it with a single MTRR */
> -    if (ram_size <= 0x80000000) {
> -        i440fx->pci_info.w32.begin = 0x80000000;
> -    } else if (ram_size <= 0xc0000000) {
> -        i440fx->pci_info.w32.begin = 0xc0000000;
> -    } else {
> -        i440fx->pci_info.w32.begin = 0xe0000000;
> -    }
> +    i440fx->pci_info.w32.begin = pci_hole_start;
>  
>      memory_region_init_alias(&f->pci_hole, OBJECT(d), "pci-hole", f->pci_address_space,
>                               pci_hole_start, pci_hole_size);
> 

please pick this up for 1.7.1.

1.7.0 has been released without this patch, also without etc/pci-info,
but with etc/acpi/tables.

For OVMF to work with "etc/acpi/tables" correctly, with eg. a guest RAM
size of 2560MB, OVMF needs:
- either this patch in qemu, or
- etc/pci-info (which won't come back), or
- a hack in OVMF that mimicks the same 0x80000000/0xc0000000/0xe0000000
  logic (which I won't add).

Thanks
Laszlo

  parent reply	other threads:[~2013-11-28 16:04 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-27 11:57 [Qemu-devel] [PATCH v2] piix: fix 32bit pci hole Gerd Hoffmann
2013-11-27 12:40 ` Laszlo Ersek
2013-12-10  4:57   ` Laszlo Ersek
2013-11-28 16:03 ` Laszlo Ersek [this message]
2014-01-10 20:28   ` Laszlo Ersek
2014-01-12  6:50     ` Michael S. Tsirkin
2014-01-14 17:02       ` Michael Roth

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=5297695B.1010003@redhat.com \
    --to=lersek@redhat.com \
    --cc=jordan.l.justen@intel.com \
    --cc=kraxel@redhat.com \
    --cc=mdroth@linux.vnet.ibm.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-stable@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).