* [Qemu-devel] [PATCH 3/4] KVM/X86: Enable Intel MPX for guest
@ 2013-11-29 13:43 Liu, Jinsong
2013-11-29 14:33 ` Paolo Bonzini
0 siblings, 1 reply; 3+ messages in thread
From: Liu, Jinsong @ 2013-11-29 13:43 UTC (permalink / raw)
To: Paolo Bonzini, Gleb Natapov, qemu-devel@nongnu.org, kvm
Cc: haoxudong.hao@gmail.com
[-- Attachment #1: Type: text/plain, Size: 3340 bytes --]
>From 11ae33723027c7b8e53a8c109f127800d7f0ad6e Mon Sep 17 00:00:00 2001
From: Liu Jinsong <jinsong.liu@intel.com>
Date: Fri, 29 Nov 2013 01:28:19 +0800
Subject: [PATCH 3/4] KVM/X86: Enable Intel MPX for guest
Enable Intel Memory Protection Extension for guest.
Signed-off-by: Xudong Hao <xudong.hao@intel.com>
Reviewed-by: Liu Jinsong <jinsong.liu@intel.com>
---
arch/x86/kvm/cpuid.c | 4 ++--
arch/x86/kvm/x86.c | 14 ++++++++++++--
arch/x86/kvm/x86.h | 3 ++-
3 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index a8ce117..e30d4ce 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -75,7 +75,7 @@ void kvm_update_cpuid(struct kvm_vcpu *vcpu)
(best->eax | ((u64)best->edx << 32)) &
host_xcr0 & KVM_SUPPORTED_XCR0;
vcpu->arch.guest_xstate_size = best->ebx =
- xstate_required_size(vcpu->arch.guest_supported_xcr0);
+ xstate_required_size(vcpu->arch.xcr0);
}
kvm_pmu_cpuid_update(vcpu);
@@ -303,7 +303,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
/* cpuid 7.0.ebx */
const u32 kvm_supported_word9_x86_features =
F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
- F(BMI2) | F(ERMS) | f_invpcid | F(RTM);
+ F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | F(MPX);
/* all calls to cpuid_count() should be made on the same cpu */
get_cpu();
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 21ef1ba..6e38698 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -576,13 +576,13 @@ static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
{
- u64 xcr0;
+ u64 xcr0 = xcr;
+ u64 old_xcr0 = vcpu->arch.xcr0;
u64 valid_bits;
/* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
if (index != XCR_XFEATURE_ENABLED_MASK)
return 1;
- xcr0 = xcr;
if (!(xcr0 & XSTATE_FP))
return 1;
if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
@@ -597,8 +597,15 @@ int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
if (xcr0 & ~valid_bits)
return 1;
+ if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
+ return 1;
+
kvm_put_guest_xcr0(vcpu);
vcpu->arch.xcr0 = xcr0;
+
+ if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
+ kvm_update_cpuid(vcpu);
+
return 0;
}
@@ -5960,6 +5967,9 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
preempt_disable();
kvm_x86_ops->prepare_guest_switch(vcpu);
+ if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
+ (vcpu->arch.xcr0 & (u64)(XSTATE_BNDREGS | XSTATE_BNDCSR)))
+ kvm_x86_ops->fpu_activate(vcpu);
if (vcpu->fpu_active)
kvm_load_guest_fpu(vcpu);
kvm_load_guest_xcr0(vcpu);
diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
index 587fb9e..985e40e 100644
--- a/arch/x86/kvm/x86.h
+++ b/arch/x86/kvm/x86.h
@@ -122,7 +122,8 @@ int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
gva_t addr, void *val, unsigned int bytes,
struct x86_exception *exception);
-#define KVM_SUPPORTED_XCR0 (XSTATE_FP | XSTATE_SSE | XSTATE_YMM)
+#define KVM_SUPPORTED_XCR0 (XSTATE_FP | XSTATE_SSE | XSTATE_YMM \
+ | XSTATE_BNDREGS | XSTATE_BNDCSR)
extern u64 host_xcr0;
extern struct static_key kvm_no_apic_vcpu;
--
1.7.1
[-- Attachment #2: 0003-KVM-X86-Enable-Intel-MPX-for-guest.patch --]
[-- Type: application/octet-stream, Size: 3242 bytes --]
From 11ae33723027c7b8e53a8c109f127800d7f0ad6e Mon Sep 17 00:00:00 2001
From: Liu Jinsong <jinsong.liu@intel.com>
Date: Fri, 29 Nov 2013 01:28:19 +0800
Subject: [PATCH 3/4] KVM/X86: Enable Intel MPX for guest.
Enable Intel Memory Protection Extension for guest.
Signed-off-by: Xudong Hao <xudong.hao@intel.com>
Reviewed-by: Liu Jinsong <jinsong.liu@intel.com>
---
arch/x86/kvm/cpuid.c | 4 ++--
arch/x86/kvm/x86.c | 14 ++++++++++++--
arch/x86/kvm/x86.h | 3 ++-
3 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index a8ce117..e30d4ce 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -75,7 +75,7 @@ void kvm_update_cpuid(struct kvm_vcpu *vcpu)
(best->eax | ((u64)best->edx << 32)) &
host_xcr0 & KVM_SUPPORTED_XCR0;
vcpu->arch.guest_xstate_size = best->ebx =
- xstate_required_size(vcpu->arch.guest_supported_xcr0);
+ xstate_required_size(vcpu->arch.xcr0);
}
kvm_pmu_cpuid_update(vcpu);
@@ -303,7 +303,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
/* cpuid 7.0.ebx */
const u32 kvm_supported_word9_x86_features =
F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
- F(BMI2) | F(ERMS) | f_invpcid | F(RTM);
+ F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | F(MPX);
/* all calls to cpuid_count() should be made on the same cpu */
get_cpu();
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 21ef1ba..6e38698 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -576,13 +576,13 @@ static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
{
- u64 xcr0;
+ u64 xcr0 = xcr;
+ u64 old_xcr0 = vcpu->arch.xcr0;
u64 valid_bits;
/* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
if (index != XCR_XFEATURE_ENABLED_MASK)
return 1;
- xcr0 = xcr;
if (!(xcr0 & XSTATE_FP))
return 1;
if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
@@ -597,8 +597,15 @@ int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
if (xcr0 & ~valid_bits)
return 1;
+ if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
+ return 1;
+
kvm_put_guest_xcr0(vcpu);
vcpu->arch.xcr0 = xcr0;
+
+ if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
+ kvm_update_cpuid(vcpu);
+
return 0;
}
@@ -5960,6 +5967,9 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
preempt_disable();
kvm_x86_ops->prepare_guest_switch(vcpu);
+ if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
+ (vcpu->arch.xcr0 & (u64)(XSTATE_BNDREGS | XSTATE_BNDCSR)))
+ kvm_x86_ops->fpu_activate(vcpu);
if (vcpu->fpu_active)
kvm_load_guest_fpu(vcpu);
kvm_load_guest_xcr0(vcpu);
diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
index 587fb9e..985e40e 100644
--- a/arch/x86/kvm/x86.h
+++ b/arch/x86/kvm/x86.h
@@ -122,7 +122,8 @@ int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
gva_t addr, void *val, unsigned int bytes,
struct x86_exception *exception);
-#define KVM_SUPPORTED_XCR0 (XSTATE_FP | XSTATE_SSE | XSTATE_YMM)
+#define KVM_SUPPORTED_XCR0 (XSTATE_FP | XSTATE_SSE | XSTATE_YMM \
+ | XSTATE_BNDREGS | XSTATE_BNDCSR)
extern u64 host_xcr0;
extern struct static_key kvm_no_apic_vcpu;
--
1.7.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [PATCH 3/4] KVM/X86: Enable Intel MPX for guest
2013-11-29 13:43 [Qemu-devel] [PATCH 3/4] KVM/X86: Enable Intel MPX for guest Liu, Jinsong
@ 2013-11-29 14:33 ` Paolo Bonzini
2013-11-29 14:52 ` Liu, Jinsong
0 siblings, 1 reply; 3+ messages in thread
From: Paolo Bonzini @ 2013-11-29 14:33 UTC (permalink / raw)
To: Liu, Jinsong
Cc: haoxudong.hao@gmail.com, qemu-devel@nongnu.org, Gleb Natapov, kvm
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index a8ce117..e30d4ce 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -75,7 +75,7 @@ void kvm_update_cpuid(struct kvm_vcpu *vcpu)
> (best->eax | ((u64)best->edx << 32)) &
> host_xcr0 & KVM_SUPPORTED_XCR0;
> vcpu->arch.guest_xstate_size = best->ebx =
> - xstate_required_size(vcpu->arch.guest_supported_xcr0);
> + xstate_required_size(vcpu->arch.xcr0);
> }
>
> kvm_pmu_cpuid_update(vcpu);
> ...
> kvm_put_guest_xcr0(vcpu);
> vcpu->arch.xcr0 = xcr0;
> +
> + if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
> + kvm_update_cpuid(vcpu);
> +
> return 0;
> }
These hunks should be part of the previous patch.
> @@ -5960,6 +5967,9 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
> preempt_disable();
>
> kvm_x86_ops->prepare_guest_switch(vcpu);
> + if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
Shouldn't be necessary, setting xcr0 fails unless OSXSAVE=1.
> + (vcpu->arch.xcr0 & (u64)(XSTATE_BNDREGS | XSTATE_BNDCSR)))
> + kvm_x86_ops->fpu_activate(vcpu);
Can you explain this?
> if (vcpu->fpu_active)
> kvm_load_guest_fpu(vcpu);
> kvm_load_guest_xcr0(vcpu);
> diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
> index 587fb9e..985e40e 100644
> --- a/arch/x86/kvm/x86.h
> +++ b/arch/x86/kvm/x86.h
> @@ -122,7 +122,8 @@ int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
> gva_t addr, void *val, unsigned int bytes,
> struct x86_exception *exception);
>
> -#define KVM_SUPPORTED_XCR0 (XSTATE_FP | XSTATE_SSE | XSTATE_YMM)
> +#define KVM_SUPPORTED_XCR0 (XSTATE_FP | XSTATE_SSE | XSTATE_YMM \
> + | XSTATE_BNDREGS | XSTATE_BNDCSR)
> extern u64 host_xcr0;
>
> extern struct static_key kvm_no_apic_vcpu;
>
Otherwise looks straightforward.
Paolo
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [PATCH 3/4] KVM/X86: Enable Intel MPX for guest
2013-11-29 14:33 ` Paolo Bonzini
@ 2013-11-29 14:52 ` Liu, Jinsong
0 siblings, 0 replies; 3+ messages in thread
From: Liu, Jinsong @ 2013-11-29 14:52 UTC (permalink / raw)
To: Paolo Bonzini
Cc: haoxudong.hao@gmail.com, qemu-devel@nongnu.org, Gleb Natapov, kvm
Paolo Bonzini wrote:
>> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
>> index a8ce117..e30d4ce 100644
>> --- a/arch/x86/kvm/cpuid.c
>> +++ b/arch/x86/kvm/cpuid.c
>> @@ -75,7 +75,7 @@ void kvm_update_cpuid(struct kvm_vcpu *vcpu)
>> (best->eax | ((u64)best->edx << 32)) &
>> host_xcr0 & KVM_SUPPORTED_XCR0;
>> vcpu->arch.guest_xstate_size = best->ebx =
>> - xstate_required_size(vcpu->arch.guest_supported_xcr0);
>> + xstate_required_size(vcpu->arch.xcr0);
>> }
>>
>> kvm_pmu_cpuid_update(vcpu);
>> ...
>> kvm_put_guest_xcr0(vcpu);
>> vcpu->arch.xcr0 = xcr0;
>> +
>> + if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
>> + kvm_update_cpuid(vcpu);
>> +
>> return 0;
>> }
>
> These hunks should be part of the previous patch.
>
>> @@ -5960,6 +5967,9 @@ static int vcpu_enter_guest(struct kvm_vcpu
>> *vcpu) preempt_disable();
>>
>> kvm_x86_ops->prepare_guest_switch(vcpu);
>> + if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
>
> Shouldn't be necessary, setting xcr0 fails unless OSXSAVE=1.
>
>> + (vcpu->arch.xcr0 & (u64)(XSTATE_BNDREGS | XSTATE_BNDCSR)))
>> + kvm_x86_ops->fpu_activate(vcpu);
>
> Can you explain this?
No, in fact I'm also some wondering about it, but per it has been tested, I didn't update this code.
I will double check and drop it if need (or, maybe Xudong can elaborate more?)
Thanks,
Jinsong
>
>> if (vcpu->fpu_active)
>> kvm_load_guest_fpu(vcpu);
>> kvm_load_guest_xcr0(vcpu);
>> diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
>> index 587fb9e..985e40e 100644
>> --- a/arch/x86/kvm/x86.h
>> +++ b/arch/x86/kvm/x86.h
>> @@ -122,7 +122,8 @@ int kvm_write_guest_virt_system(struct
>> x86_emulate_ctxt *ctxt, gva_t addr, void *val, unsigned int bytes,
>> struct x86_exception *exception);
>>
>> -#define KVM_SUPPORTED_XCR0 (XSTATE_FP | XSTATE_SSE | XSTATE_YMM)
>> +#define KVM_SUPPORTED_XCR0 (XSTATE_FP | XSTATE_SSE | XSTATE_YMM \
>> + | XSTATE_BNDREGS | XSTATE_BNDCSR)
>> extern u64 host_xcr0;
>>
>> extern struct static_key kvm_no_apic_vcpu;
>>
>
> Otherwise looks straightforward.
Thanks, will update per your comments.
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2013-11-29 14:53 UTC | newest]
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2013-11-29 13:43 [Qemu-devel] [PATCH 3/4] KVM/X86: Enable Intel MPX for guest Liu, Jinsong
2013-11-29 14:33 ` Paolo Bonzini
2013-11-29 14:52 ` Liu, Jinsong
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