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From: Paolo Bonzini <pbonzini@redhat.com>
To: "Liu, Jinsong" <jinsong.liu@intel.com>
Cc: "haoxudong.hao@gmail.com" <haoxudong.hao@gmail.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	Gleb Natapov <gleb@redhat.com>, kvm <kvm@vger.kernel.org>
Subject: Re: [Qemu-devel] [PATCH 2/2] target-i386: Intel MPX support
Date: Fri, 29 Nov 2013 16:42:08 +0100	[thread overview]
Message-ID: <5298B5D0.9050501@redhat.com> (raw)
In-Reply-To: <DE8DF0795D48FD4CA783C40EC8292335013EF522@SHSMSX101.ccr.corp.intel.com>

Il 29/11/2013 15:50, Liu, Jinsong ha scritto:
> > There is no reason to get the size and offset from the host.  Peter
> > Anvin confirmed that the sizes and offsets will never change (as
> > should be the case for migration to work across different CPU
> > versions).  In fact, the size and offset is documented for every
> > XSAVE feature except MPX in the copy I have of the Intel
> > documentation. 
> 
> If the sizes and offsets will never change, what's the bad effect of getting them from host?

In case TCG gets AVX/MPX support later, you will not be able to get
CPUID values from the host.  The leaf 0xd code was written so that it
would work for both KVM and TCG.

When QEMU got AVX support, we decided not to treat XSAVE data as opaque
blobs, and instead "unmarshal" data out of it into the CPUX86State
struct and back.  This is again useful for TCG, but it also makes for
easier interpretation of migration state.  You will have to rely on
precise sizes and offsets in the marshaling/unmarshaling code of
kvm_get_xsave/kvm_put_xsave, so it is not a big problem to have them
here as well.

Paolo

      reply	other threads:[~2013-11-29 15:42 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-29 13:17 [Qemu-devel] [PATCH 2/2] target-i386: Intel MPX support Liu, Jinsong
2013-11-29 13:24 ` Paolo Bonzini
2013-11-29 14:50   ` Liu, Jinsong
2013-11-29 15:42     ` Paolo Bonzini [this message]

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