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Sender: Richard Henderson <rth7680@gmail.com>
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Date: Wed, 04 Dec 2013 13:00:06 +1300
From: Richard Henderson <rth@twiddle.net>
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Subject: Re: [Qemu-devel] [PATCH 09/12] target-arm: A64: add support for BR,
 BLR and RET insns
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To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: patches@linaro.org, Michael Matz <matz@suse.de>, Alexander Graf <agraf@suse.de>, C Fontana <claudio.fontana@linaro.org>, Dirk Mueller <dmueller@suse.de>, Laurent Desnogues <laurent.desnogues@gmail.com>, kvmarm@lists.cs.columbia.edu

On 12/04/2013 10:51 AM, Peter Maydell wrote:
> From: Alexander Graf <agraf@suse.de>
> 
> Implement BR, BLR and RET. This is all of the 'unconditional
> branch (register)' instruction category except for ERET
> and DPRS (which are system mode only).
> 
> Signed-off-by: Alexander Graf <agraf@suse.de>
> [claudio: reimplemented on top of new decoder structure]
> Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  target-arm/translate-a64.c |   43 +++++++++++++++++++++++++++++++++++++++++--
>  1 file changed, 41 insertions(+), 2 deletions(-)


Reviewed-by: Richard Henderson <rth@twiddle.net>


r~