From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42045) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vo0Hl-0002Su-Pr for qemu-devel@nongnu.org; Tue, 03 Dec 2013 19:25:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Vo0He-0004Xx-FF for qemu-devel@nongnu.org; Tue, 03 Dec 2013 19:25:49 -0500 Sender: Richard Henderson Message-ID: <529E765D.7010401@twiddle.net> Date: Wed, 04 Dec 2013 13:25:01 +1300 From: Richard Henderson MIME-Version: 1.0 References: <1386086305-8163-1-git-send-email-tommusta@gmail.com> In-Reply-To: <1386086305-8163-1-git-send-email-tommusta@gmail.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [V3 PATCH 00/14] target-ppc: VSX Stage 4 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Tom Musta , qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org On 12/04/2013 04:58 AM, Tom Musta wrote: > This is the fourth and final series of patches that add emulation support > to QEMU for the PowerPC Vector Scalar Extension (VSX). > > This series adds the instructions that were newly introduced with Power ISA > V2.07. This includes 3 scalar load instructions, 2 scalar store instructions, > 7 standard single precision scalar arithmetic instructions, 8 scalar single > precision fused multiply/add instructions, two integer-to-single-precision > conversion instructions and 3 vector logical instructions. > > The single-precision scalar arithmetic instructions all interpret the most > significant 64 bits of a VSR as a single precision floating point number > stored in double precision format (similar to the standard PowerPC floating > point single precision instructions). Thus a common theme in the supporting > code is rounding of an intermediate double-precision number to single > precision. > > V2: (a) Changed the rounding to single precision to reuse the existing > helper_frsp() routine. (b) Re-implemented the fused multiply/add instructions > to use float32_muladd instead of float64_muladd, which avoids subtle rounding > errors. > > V3: Re-implemented fused multiply/add (patch 0012/0014) per clarification > from Richard Henderson. > > Tom Musta (14): > target-ppc: VSX Stage 4: Add VSX 2.07 Flag > target-ppc: VSX Stage 4: Refactor lxsdx > target-ppc: VSX Stage 4: Add lxsiwax, lxsiwzx and lxsspx > target-ppc: VSX Stage 4: Refactor stxsdx > target-ppc: VSX Stage 4: Add stxsiwx and stxsspx > target-ppc: VSX Stage 4: Add xsaddsp and xssubsp > target-ppc: VSX Stage 4: Add xsmulsp > target-ppc: VSX Stage 4: Add xsdivsp > target-ppc: VSX Stage 4: Add xsresp > target-ppc: VSX Stage 4: Add xssqrtsp > target-ppc: VSX Stage 4: add xsrsqrtesp > target-ppc: VSX Stage 4: Add Scalar SP Fused Multiply-Adds > target-ppc: VSX Stage 4: Add xscvsxdsp and xscvuxdsp > target-ppc: VSX Stage 4: Add xxleqv, xxlnand and xxlorc > > target-ppc/cpu.h | 4 +- > target-ppc/fpu_helper.c | 197 ++++++++++++++++++++++++++++--------------- > target-ppc/helper.h | 18 ++++ > target-ppc/translate.c | 110 ++++++++++++++++++------ > target-ppc/translate_init.c | 2 +- > 5 files changed, 236 insertions(+), 95 deletions(-) > I think I've now reviewed the entire series, as I think that only the fma patch was really outstanding. It would be helpful if you'd copy any given Reviewed-by into the patch description for subsequent rounds, if the patch is unchanged. r~