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Sender: Richard Henderson <rth7680@gmail.com>
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Date: Thu, 05 Dec 2013 10:55:07 +1300
From: Richard Henderson <rth@twiddle.net>
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Subject: Re: [Qemu-devel] [PATCH v2 08/12] target-arm: A64: add support for
	B and BL insns
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To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: patches@linaro.org, Michael Matz <matz@suse.de>, Alexander Graf <agraf@suse.de>, C Fontana <claudio.fontana@linaro.org>, Dirk Mueller <dmueller@suse.de>, Laurent Desnogues <laurent.desnogues@gmail.com>, kvmarm@lists.cs.columbia.edu

On 12/05/2013 08:33 AM, Peter Maydell wrote:
> @@ -680,6 +720,7 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
>      dc->condjmp = 0;
>  
>      dc->aarch64 = 1;
> +    dc->tmp_a64_count = 0;
>      dc->thumb = 0;
>      dc->bswap_code = 0;
>      dc->condexec_mask = 0;

Still no initialization of ->tmp_a64[]?


r~