From: Richard Henderson <rth@twiddle.net>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: patches@linaro.org, "Michael Matz" <matz@suse.de>,
"Claudio Fontana" <claudio.fontana@linaro.org>,
"Dirk Mueller" <dmueller@suse.de>,
"Will Newton" <will.newton@linaro.org>,
"Laurent Desnogues" <laurent.desnogues@gmail.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
kvmarm@lists.cs.columbia.edu,
"Christoffer Dall" <christoffer.dall@linaro.org>
Subject: Re: [Qemu-devel] [PATCH 06/13] target-arm: A64: add support for 2-src shift reg insns
Date: Fri, 06 Dec 2013 11:52:43 +1300 [thread overview]
Message-ID: <52A103BB.8070204@twiddle.net> (raw)
In-Reply-To: <1386280289-27636-7-git-send-email-peter.maydell@linaro.org>
On 12/06/2013 10:51 AM, Peter Maydell wrote:
> From: Alexander Graf <agraf@suse.de>
>
> This adds 2-src variable shift register instructions:
> C5.6.115 LSLV, C5.6.118 LSRV, C5.6.17 ASRV, C5.6.154 RORV
>
> Signed-off-by: Alexander Graf <agraf@suse.de>
> [claudio: adapted to new decoder, use enums for shift types]
> Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> target-arm/translate-a64.c | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
Reviewed-by: Richard Henderson <rth@twiddle.net>
r~
next prev parent reply other threads:[~2013-12-05 22:53 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-05 21:51 [Qemu-devel] [PATCH 00/13] target-arm: A64 decoder set 2: misc logic and bit ops Peter Maydell
2013-12-05 21:51 ` [Qemu-devel] [PATCH 01/13] target-arm: A64: add support for conditional select Peter Maydell
2013-12-05 22:26 ` Richard Henderson
2013-12-05 22:31 ` Peter Maydell
2013-12-05 22:40 ` Richard Henderson
2013-12-06 12:45 ` Peter Maydell
2013-12-06 16:44 ` Richard Henderson
2013-12-06 17:23 ` Peter Maydell
2013-12-05 21:51 ` [Qemu-devel] [PATCH 02/13] target-arm: A64: add support for logical (shifted register) Peter Maydell
2013-12-05 22:39 ` Richard Henderson
2013-12-06 9:36 ` Alex Bennée
2013-12-06 16:49 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 03/13] target-arm: A64: add support for ADR and ADRP Peter Maydell
2013-12-05 22:41 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 04/13] target-arm: A64: add support for EXTR Peter Maydell
2013-12-05 22:47 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 05/13] target-arm: A64: add support for 2-src data processing and DIV Peter Maydell
2013-12-05 22:51 ` Richard Henderson
2013-12-05 23:09 ` Peter Maydell
2013-12-05 23:13 ` Richard Henderson
2013-12-05 23:21 ` C Fontana
2013-12-05 23:24 ` Eric Blake
2013-12-05 21:51 ` [Qemu-devel] [PATCH 06/13] target-arm: A64: add support for 2-src shift reg insns Peter Maydell
2013-12-05 22:52 ` Richard Henderson [this message]
2013-12-05 21:51 ` [Qemu-devel] [PATCH 07/13] target-arm: A64: add support for 1-src data processing and CLZ Peter Maydell
2013-12-05 22:54 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 08/13] target-arm: A64: add support for 1-src RBIT insn Peter Maydell
2013-12-05 22:56 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 09/13] target-arm: A64: add support for 1-src REV insns Peter Maydell
2013-12-05 23:01 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 10/13] target-arm: A64: add support for bitfield insns Peter Maydell
2013-12-05 23:05 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 11/13] host-utils: add clrsb32/64 - count leading redundant sign bits Peter Maydell
2013-12-05 23:06 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 12/13] target-arm: A64: add support for 1-src CLS insn Peter Maydell
2013-12-05 23:06 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 13/13] target-arm: A64: add support for logical (immediate) insns Peter Maydell
2013-12-05 23:39 ` Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=52A103BB.8070204@twiddle.net \
--to=rth@twiddle.net \
--cc=alex.bennee@linaro.org \
--cc=christoffer.dall@linaro.org \
--cc=claudio.fontana@linaro.org \
--cc=dmueller@suse.de \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=laurent.desnogues@gmail.com \
--cc=matz@suse.de \
--cc=patches@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=will.newton@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).