From: Eric Blake <eblake@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>,
Richard Henderson <rth@twiddle.net>
Cc: "Laurent Desnogues" <laurent.desnogues@gmail.com>,
"Patch Tracking" <patches@linaro.org>,
"Michael Matz" <matz@suse.de>,
"QEMU Developers" <qemu-devel@nongnu.org>,
"Claudio Fontana" <claudio.fontana@linaro.org>,
"Dirk Mueller" <dmueller@suse.de>,
"Will Newton" <will.newton@linaro.org>,
"Alex Bennée" <alex.bennee@linaro.org>,
"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
"Christoffer Dall" <christoffer.dall@linaro.org>
Subject: Re: [Qemu-devel] [PATCH 05/13] target-arm: A64: add support for 2-src data processing and DIV
Date: Thu, 05 Dec 2013 16:24:43 -0700 [thread overview]
Message-ID: <52A10B3B.8050303@redhat.com> (raw)
In-Reply-To: <CAFEAcA874hiXkKGf_Y21fEj1orrdCKvUJ1d8zfp+CTbXDAFMpA@mail.gmail.com>
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On 12/05/2013 04:09 PM, Peter Maydell wrote:
> On 5 December 2013 22:51, Richard Henderson <rth@twiddle.net> wrote:
>> On 12/06/2013 10:51 AM, Peter Maydell wrote:
>>> + switch (opcode) {
>>> + case 2: /* UDIV */
>>> + handle_div(s, FALSE, sf, rm, rn, rd);
>>> + break;
>>> + case 3: /* SDIV */
>>> + handle_div(s, TRUE, sf, rm, rn, rd);
>>> + break;
>>
>> What are these all-caps TRUE/FALSE? stdbool.h uses lower-case.
>
> Good question, I wonder what system header is managing to define
> those for us? (there are some other bits of the source tree which
> use them too I see).
I blame glib:
https://developer.gnome.org/glib/2.32/glib-Standard-Macros.html#TRUE:CAPS
There are cases in the code where we must use TRUE because we want to
ensure we are using the gboolean type (which is not necessarily the same
size as bool), but I also concur that the use of <stdbool.h> true is
much nicer than TRUE in any code unrelated to glib.
--
Eric Blake eblake redhat com +1-919-301-3266
Libvirt virtualization library http://libvirt.org
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next prev parent reply other threads:[~2013-12-05 23:25 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-05 21:51 [Qemu-devel] [PATCH 00/13] target-arm: A64 decoder set 2: misc logic and bit ops Peter Maydell
2013-12-05 21:51 ` [Qemu-devel] [PATCH 01/13] target-arm: A64: add support for conditional select Peter Maydell
2013-12-05 22:26 ` Richard Henderson
2013-12-05 22:31 ` Peter Maydell
2013-12-05 22:40 ` Richard Henderson
2013-12-06 12:45 ` Peter Maydell
2013-12-06 16:44 ` Richard Henderson
2013-12-06 17:23 ` Peter Maydell
2013-12-05 21:51 ` [Qemu-devel] [PATCH 02/13] target-arm: A64: add support for logical (shifted register) Peter Maydell
2013-12-05 22:39 ` Richard Henderson
2013-12-06 9:36 ` Alex Bennée
2013-12-06 16:49 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 03/13] target-arm: A64: add support for ADR and ADRP Peter Maydell
2013-12-05 22:41 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 04/13] target-arm: A64: add support for EXTR Peter Maydell
2013-12-05 22:47 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 05/13] target-arm: A64: add support for 2-src data processing and DIV Peter Maydell
2013-12-05 22:51 ` Richard Henderson
2013-12-05 23:09 ` Peter Maydell
2013-12-05 23:13 ` Richard Henderson
2013-12-05 23:21 ` C Fontana
2013-12-05 23:24 ` Eric Blake [this message]
2013-12-05 21:51 ` [Qemu-devel] [PATCH 06/13] target-arm: A64: add support for 2-src shift reg insns Peter Maydell
2013-12-05 22:52 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 07/13] target-arm: A64: add support for 1-src data processing and CLZ Peter Maydell
2013-12-05 22:54 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 08/13] target-arm: A64: add support for 1-src RBIT insn Peter Maydell
2013-12-05 22:56 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 09/13] target-arm: A64: add support for 1-src REV insns Peter Maydell
2013-12-05 23:01 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 10/13] target-arm: A64: add support for bitfield insns Peter Maydell
2013-12-05 23:05 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 11/13] host-utils: add clrsb32/64 - count leading redundant sign bits Peter Maydell
2013-12-05 23:06 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 12/13] target-arm: A64: add support for 1-src CLS insn Peter Maydell
2013-12-05 23:06 ` Richard Henderson
2013-12-05 21:51 ` [Qemu-devel] [PATCH 13/13] target-arm: A64: add support for logical (immediate) insns Peter Maydell
2013-12-05 23:39 ` Richard Henderson
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