From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58132) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqB9j-0003SX-Qe for qemu-devel@nongnu.org; Mon, 09 Dec 2013 19:26:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VqB9b-0002in-D6 for qemu-devel@nongnu.org; Mon, 09 Dec 2013 19:26:31 -0500 Sender: Richard Henderson Message-ID: <52A65FAA.1070403@twiddle.net> Date: Mon, 09 Dec 2013 16:26:18 -0800 From: Richard Henderson MIME-Version: 1.0 References: <1386604035-2507-1-git-send-email-tommusta@gmail.com> <1386604035-2507-6-git-send-email-tommusta@gmail.com> In-Reply-To: <1386604035-2507-6-git-send-email-tommusta@gmail.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 05/18] target-ppc: Add ISA 2.06 divwe[u][o] Instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Tom Musta , qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org On 12/09/2013 07:47 AM, Tom Musta wrote: > + /* does the result fit in 32 bits? */ \ > + tcg_gen_brcondi_i64(TCG_COND_LT, cpu_gpr[rD(ctx->opcode)], INT32_MIN, \ > + lbl_ov); \ > + tcg_gen_brcondi_i64(TCG_COND_GT, cpu_gpr[rD(ctx->opcode)], INT32_MAX, \ > + lbl_ov); \ Better with an extend and single brcond. > + tcg_gen_shli_i64(ra, cpu_gpr[rA(ctx->opcode)], 32); \ > + /* check for MIN div -1 */ \ > + int l3 = gen_new_label(); \ > + tcg_gen_brcondi_i64(TCG_COND_NE, rb, -1l, l3); \ > + tcg_gen_brcondi_i64(TCG_COND_EQ, ra, INT64_MIN, lbl_ov); \ The second test can never be true, since ra has 32 zero bits. Thus the first test is also pointless. > + gen_set_label(lbl_ov); /* overflow handling */ \ > + \ > + if (signed) { \ > + tcg_gen_sari_i64(cpu_gpr[rD(ctx->opcode)], ra, 63); \ > + } else { \ > + tcg_gen_movi_i64(cpu_gpr[rD(ctx->opcode)], 0); \ > + } \ Divide by zero from the signed case reads an uninitialized ra here. While it's true that the result is undefined, I don't think we want to expose uninitialized reads to the TCG optimizer. Although... what is that sari for anyway? The result is undefined in the non-div-by-zero overflow case as well. We might as well use 0, or even 0xdeadbeef, all the time, no? r~