From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48518) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqFOJ-0001Ih-Hj for qemu-devel@nongnu.org; Mon, 09 Dec 2013 23:57:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VqFOB-0002pI-Vk for qemu-devel@nongnu.org; Mon, 09 Dec 2013 23:57:51 -0500 Received: from mx1.redhat.com ([209.132.183.28]:12462) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqFOB-0002p7-Ml for qemu-devel@nongnu.org; Mon, 09 Dec 2013 23:57:43 -0500 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id rBA4vgqb025265 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Mon, 9 Dec 2013 23:57:43 -0500 Message-ID: <52A69F45.7050005@redhat.com> Date: Tue, 10 Dec 2013 05:57:41 +0100 From: Laszlo Ersek MIME-Version: 1.0 References: <1385553451-1352-1-git-send-email-kraxel@redhat.com> <5295E854.5010604@redhat.com> In-Reply-To: <5295E854.5010604@redhat.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2] piix: fix 32bit pci hole List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Gerd Hoffmann On 11/27/13 13:40, Laszlo Ersek wrote: > On 11/27/13 12:57, Gerd Hoffmann wrote: >> Make the 32bit pci hole start at end of ram, so all possible address >> space is covered. Of course the firmware can use less than that. >> Leaving space unused is no problem, mapping pci bars outside the >> hole causes problems though. >> >> Signed-off-by: Gerd Hoffmann >> --- >> hw/pci-host/piix.c | 10 +--------- >> 1 file changed, 1 insertion(+), 9 deletions(-) >> >> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c >> index edc974e..8e41ac1 100644 >> --- a/hw/pci-host/piix.c >> +++ b/hw/pci-host/piix.c >> @@ -345,15 +345,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, >> f->ram_memory = ram_memory; >> >> i440fx = I440FX_PCI_HOST_BRIDGE(dev); >> - /* Set PCI window size the way seabios has always done it. */ >> - /* Power of 2 so bios can cover it with a single MTRR */ >> - if (ram_size <= 0x80000000) { >> - i440fx->pci_info.w32.begin = 0x80000000; >> - } else if (ram_size <= 0xc0000000) { >> - i440fx->pci_info.w32.begin = 0xc0000000; >> - } else { >> - i440fx->pci_info.w32.begin = 0xe0000000; >> - } >> + i440fx->pci_info.w32.begin = pci_hole_start; >> >> memory_region_init_alias(&f->pci_hole, OBJECT(d), "pci-hole", f->pci_address_space, >> pci_hole_start, pci_hole_size); >> > > Reviewed-by: Laszlo Ersek Can someone please pick this up? (I've also nominated it for 1.7.1.) Thanks, Laszlo