From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51466) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VrGsh-0003br-Am for qemu-devel@nongnu.org; Thu, 12 Dec 2013 19:45:31 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VrGsc-0000fE-JN for qemu-devel@nongnu.org; Thu, 12 Dec 2013 19:45:27 -0500 Received: from [222.73.24.84] (port=25617 helo=song.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VrGsc-0000eW-7F for qemu-devel@nongnu.org; Thu, 12 Dec 2013 19:45:22 -0500 Message-ID: <52AA583A.4060903@cn.fujitsu.com> Date: Fri, 13 Dec 2013 08:43:38 +0800 From: Li Guang MIME-Version: 1.0 References: <1386749341-9843-1-git-send-email-lig.fnst@cn.fujitsu.com> <1386749341-9843-4-git-send-email-lig.fnst@cn.fujitsu.com> In-Reply-To: Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset=UTF-8; format=flowed Subject: Re: [Qemu-devel] [PATCH v11 3/5] hw/intc: add allwinner A10 interrupt controller List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Peter Crosthwaite , Juan Quintela , QEMU Developers , Stefan Hajnoczi , =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= Peter Maydell wrote: > On 11 December 2013 08:08, liguang wrote: > >> +static void aw_a10_pic_set_irq(void *opaque, int irq, int level) >> +{ >> + AwA10PICState *s = opaque; >> + >> + if (level) { >> + set_bit(irq%32, (void *)&s->irq_pending[irq/32]); >> > The % and / operators here should have spaces round them. > > >> + } >> + aw_a10_pic_update(s); >> +} >> + >> +static uint64_t aw_a10_pic_read(void *opaque, hwaddr offset, unsigned size) >> +{ >> + AwA10PICState *s = opaque; >> + uint8_t index = (offset& 0xc)/4; >> > Spaces. > will fix, thanks! > Otherwise > Reviewed-by: Peter Maydell > > -- PMM > >