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Subject: Re: [Qemu-devel] [PATCH] roms: Flush icache when writing roms to
	guest memory
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To: Scott Wood <scottwood@freescale.com>
Cc: Peter Maydell <peter.maydell@linaro.org>, "Bogdan.Vlad@freescale.com" <Bogdan.Vlad@freescale.com>, Alexander Graf <agraf@suse.de>, QEMU Developers <qemu-devel@nongnu.org>, Marc Zyngier <marc.zyngier@arm.com>, "qemu-ppc@nongnu.org" <qemu-ppc@nongnu.org>, "mihai.caraman@freescale.com" <mihai.caraman@freescale.com>, "Varun.Sethi@freescale.com" <Varun.Sethi@freescale.com>

Il 13/12/2013 20:18, Scott Wood ha scritto:
>> Also are you sure flush_icache_range()
>> works correctly when multiple threads (multiple vCPUs,
>> potentially executing on different host CPUs) are involved?
> 
> On PPC these cache operations broadcast, and are the architecturally
> defined way of doing self-modifying code.

I expect that to be the same on any cache-coherent system.

On a VIVT cache with shadow paging, some kernel collaboration may be
necessary because you have to flush using guest addresses rather than
host addresses (or alternatively you have to flush a whole context id).
 But we can fix the problem when it happens.

Paolo