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From: "Andreas Färber" <afaerber@suse.de>
To: Peter Crosthwaite <peter.crosthwaite@xilinx.com>, qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, antonynpavlov@gmail.com
Subject: Re: [Qemu-devel] [PATCH v1 01/11] char/cadence_uart: Mark struct fields as public/private
Date: Thu, 19 Dec 2013 00:15:59 +0100	[thread overview]
Message-ID: <52B22CAF.9070603@suse.de> (raw)
In-Reply-To: <99da8f561252a97b53c5ec2e5006c5b44f25c5f6.1387244071.git.peter.crosthwaite@xilinx.com>

Am 17.12.2013 02:40, schrieb Peter Crosthwaite:
> As per current QOM conventions.
> 
> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
> ---
> 
>  hw/char/cadence_uart.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
> index f18db53..2f19a53 100644
> --- a/hw/char/cadence_uart.c
> +++ b/hw/char/cadence_uart.c
> @@ -110,7 +110,9 @@
>  #define CADENCE_UART(obj) OBJECT_CHECK(UartState, (obj), TYPE_CADENCE_UART)
>  
>  typedef struct {
> +    /* <private> */
>      SysBusDevice parent_obj;
> +    /* <public> */

Note that it's /*< ... >*/ if I'm not mistaken.

However since this is outside include/ it won't get parsed by the
patches flying around. This being Cadence IP that is likely to be reused
on other SoCs, I do guess we'll end up with an
include/hw/char/cadence_uart.h at some point.

Cheers,
Andreas

>  
>      MemoryRegion iomem;
>      uint32_t r[R_MAX];

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

  reply	other threads:[~2013-12-18 23:16 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-17  1:39 [Qemu-devel] [PATCH v1 00/11] Cadence UART cleanups and Tx path fixes Peter Crosthwaite
2013-12-17  1:40 ` [Qemu-devel] [PATCH v1 01/11] char/cadence_uart: Mark struct fields as public/private Peter Crosthwaite
2013-12-18 23:15   ` Andreas Färber [this message]
2013-12-18 23:21     ` Peter Crosthwaite
2013-12-17  1:40 ` [Qemu-devel] [PATCH v1 02/11] char/cadence_uart: Add missing uart_update_state Peter Crosthwaite
2013-12-17  1:41 ` [Qemu-devel] [PATCH v1 03/11] char/cadence_uart: Fix reset Peter Crosthwaite
2013-12-17  1:42 ` [Qemu-devel] [PATCH v1 04/11] char/cadence_uart: s/r_fifo/rx_fifo Peter Crosthwaite
2013-12-17  1:42 ` [Qemu-devel] [PATCH v1 05/11] char/cadence_uart: Simplify status generation Peter Crosthwaite
2013-12-17  1:43 ` [Qemu-devel] [PATCH v1 06/11] char/cadence_uart: Define Missing SR/ISR fields Peter Crosthwaite
2013-12-17  1:43 ` [Qemu-devel] [PATCH v1 07/11] char/cadence_uart: Remove TX timer & add TX FIFO state Peter Crosthwaite
2013-12-17  1:44 ` [Qemu-devel] [PATCH v1 08/11] char/cadence_uart: Fix can_receive logic Peter Crosthwaite
2013-12-17  1:45 ` [Qemu-devel] [PATCH v1 09/11] char/cadence_uart: Use the TX fifo for transmission Peter Crosthwaite
2013-12-17  1:45 ` [Qemu-devel] [PATCH v1 10/11] char/cadence_uart: Delete redundant rx rst logic Peter Crosthwaite
2013-12-17  1:46 ` [Qemu-devel] [PATCH v1 11/11] char/cadence_uart: Implement Tx flow control Peter Crosthwaite

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