From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44102) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VtkFM-0001bT-IB for qemu-devel@nongnu.org; Thu, 19 Dec 2013 15:31:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VtkFG-0001bz-PJ for qemu-devel@nongnu.org; Thu, 19 Dec 2013 15:31:04 -0500 Received: from mail-qa0-x22c.google.com ([2607:f8b0:400d:c00::22c]:36038) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VtkFG-0001bs-KW for qemu-devel@nongnu.org; Thu, 19 Dec 2013 15:30:58 -0500 Received: by mail-qa0-f44.google.com with SMTP id i13so5210083qae.3 for ; Thu, 19 Dec 2013 12:30:58 -0800 (PST) Sender: Richard Henderson Message-ID: <52B3577A.5050204@twiddle.net> Date: Thu, 19 Dec 2013 12:30:50 -0800 From: Richard Henderson MIME-Version: 1.0 References: <1387293144-11554-1-git-send-email-peter.maydell@linaro.org> <1387293144-11554-14-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1387293144-11554-14-git-send-email-peter.maydell@linaro.org> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 13/21] target-arm: A64: Implement MRS/MSR/SYS/SYSL List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell , qemu-devel@nongnu.org Cc: patches@linaro.org, Michael Matz , Claudio Fontana , Dirk Mueller , Will Newton , Laurent Desnogues , =?ISO-8859-1?Q?Alex_Benn=E9e?= , kvmarm@lists.cs.columbia.edu, Christoffer Dall On 12/17/2013 07:12 AM, Peter Maydell wrote: > +/* Force a TB lookup after an instruction that changes the CPU state */ > +static inline void gen_lookup_tb(DisasContext *s) > +{ > + gen_a64_set_pc_im(s->pc); > + s->is_jmp = DISAS_UPDATE; > +} > + I'm a bit surprised that this set_pc doesn't happen in gen_intermediate_code_internal_a64. Otherwise, what's the point in distinguishing between DISAS_JUMP and DISAS_UPDATE? Otherwise, Reviewed-by: Richard Henderson r~