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From: Richard Henderson <rth@twiddle.net>
To: Tom Musta <tommusta@gmail.com>, qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org
Subject: Re: [Qemu-devel] [V3 PATCH 10/14] target-ppc: Fix and enable fri[mnpz]
Date: Tue, 24 Dec 2013 08:02:14 -0800	[thread overview]
Message-ID: <52B9B006.5010307@twiddle.net> (raw)
In-Reply-To: <1387399747-4994-11-git-send-email-tommusta@gmail.com>

On 12/18/2013 12:49 PM, Tom Musta wrote:
> The fri* series of instructions was introduced prior to ISA 2.06 and
> is supported on Power7 and Power8 hardware.  However, the instruction
> is still considered illegal in the P7 and P8 QEMU emulation models.
> This patch enables these instructions for the P7 and P8 machines.
> 
> Also, the existing helper is modified to correctly handle some of
> the boundary cases (NaNs and the inexact flag).
> 
> Signed-off-by: Tom Musta <tommusta@gmail.com>
> ---
>  target-ppc/fpu_helper.c     |   12 ++++++------
>  target-ppc/translate_init.c |    2 ++
>  2 files changed, 8 insertions(+), 6 deletions(-)

Probably should be separate patches, but whatever.

> +        farg.ll = float64_default_nan | 0x0008000000000000ul;

That doesn't match what I see here:

  FRT <-  (FRB)
  FRT12 <- 1

i.e.

  farg.ll |= 1ull << (63 - 12);

i.e. mostly preserve the SNAN input.

I'll also note that frin can't properly be implemented with
float_round_nearest_even because it doesn't round to even.


r~

  reply	other threads:[~2013-12-24 16:02 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-18 20:48 [Qemu-devel] [V3 PATCH 00/14] target-ppc: Base ISA V2.06 for Power7/Power8 Tom Musta
2013-12-18 20:48 ` [Qemu-devel] [V3 PATCH 01/14] target-ppc: Add Flag for Power ISA V2.06 Tom Musta
2013-12-24 15:11   ` Richard Henderson
2013-12-18 20:48 ` [Qemu-devel] [V3 PATCH 02/14] target-ppc: Add ISA2.06 bpermd Instruction Tom Musta
2013-12-24 15:17   ` Richard Henderson
2013-12-28  0:23     ` Scott Wood
2013-12-30 14:48       ` Richard Henderson
2013-12-30 15:43         ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
2013-12-30 16:23           ` Richard Henderson
2013-12-28  0:27   ` [Qemu-devel] " Scott Wood
2013-12-18 20:48 ` [Qemu-devel] [V3 PATCH 03/14] target-ppc: Add ISA2.06 divdeu[o] Instructions Tom Musta
2013-12-24 15:20   ` Richard Henderson
2013-12-28  0:30   ` [Qemu-devel] [Qemu-ppc] " Scott Wood
2014-01-03 19:24     ` Tom Musta
2014-01-03 19:43       ` Scott Wood
2013-12-18 20:48 ` [Qemu-devel] [V3 PATCH 04/14] target-ppc: Add ISA2.06 divde[o] Instructions Tom Musta
2013-12-24 15:22   ` Richard Henderson
2013-12-18 20:48 ` [Qemu-devel] [V3 PATCH 05/14] target-ppc: Add ISA 2.06 divwe[u][o] Instructions Tom Musta
2013-12-24 15:26   ` Richard Henderson
2013-12-18 20:48 ` [Qemu-devel] [V3 PATCH 06/14] target-ppc: Add ISA2.06 lbarx, lharx Instructions Tom Musta
2013-12-24 15:28   ` Richard Henderson
2013-12-18 20:49 ` [Qemu-devel] [V3 PATCH 07/14] target-ppc: Add ISA 2.06 stbcx. and sthcx. Instructions Tom Musta
2013-12-24 15:31   ` Richard Henderson
2013-12-18 20:49 ` [Qemu-devel] [V3 PATCH 08/14] target-ppc: Add ISA2.06 Float to Integer Instructions Tom Musta
2013-12-24 15:36   ` Richard Henderson
2013-12-18 20:49 ` [Qemu-devel] [V3 PATCH 09/14] target-ppc: Add ISA 2.06 fcfid[u][s] Instructions Tom Musta
2013-12-24 15:41   ` Richard Henderson
2013-12-18 20:49 ` [Qemu-devel] [V3 PATCH 10/14] target-ppc: Fix and enable fri[mnpz] Tom Musta
2013-12-24 16:02   ` Richard Henderson [this message]
2014-01-06 20:06     ` Tom Musta
2013-12-18 20:49 ` [Qemu-devel] [V3 PATCH 11/14] target-ppc: Add ISA 2.06 ftdiv Instruction Tom Musta
2013-12-24 16:06   ` Richard Henderson
2013-12-18 20:49 ` [Qemu-devel] [V3 PATCH 12/14] target-ppc: Add ISA 2.06 ftsqrt Tom Musta
2013-12-24 16:07   ` Richard Henderson
2013-12-18 20:49 ` [Qemu-devel] [V3 PATCH 13/14] target-ppc: Enable frsqrtes on Power7 and Power8 Tom Musta
2013-12-24 16:07   ` Richard Henderson
2013-12-18 20:49 ` [Qemu-devel] [V3 PATCH 14/14] target-ppc: Add ISA2.06 lfiwzx Instruction Tom Musta
2013-12-24 16:09   ` Richard Henderson

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