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From: Richard Henderson <rth@twiddle.net>
To: Scott Wood <scottwood@freescale.com>
Cc: Tom Musta <tommusta@gmail.com>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [V3 PATCH 02/14] target-ppc: Add ISA2.06 bpermd Instruction
Date: Mon, 30 Dec 2013 06:48:53 -0800	[thread overview]
Message-ID: <52C187D5.8090306@twiddle.net> (raw)
In-Reply-To: <1388190214.21454.30.camel@snotra.buserror.net>

On 12/27/2013 04:23 PM, Scott Wood wrote:
> On Tue, 2013-12-24 at 07:17 -0800, Richard Henderson wrote:
>> On 12/18/2013 12:48 PM, Tom Musta wrote:
>>> +DEF_HELPER_3(bpermd, i64, env, i64, i64)
>>
>> Should be DEF_HELPER_FLAGS_2(bpermd, TCG_CALL_NO_RWG_SE, i64, i64, i64)
>>
>>> +uint64_t helper_bpermd(CPUPPCState *env, uint64_t rs, uint64_t rb)
>>> +{
>>> +    int i;
>>> +    uint64_t ra = 0;
>>> +
>>> +    for (i = 0; i < 8; i++) {
>>> +        int index = (rs >> (i*8)) & 0xFF;
>>> +        if (index < 64) {
>>> +            if (rb & (1ul << (63-index))) {
>>> +                ra |= 1 << i;
>>> +            }
>>> +        }
>>> +    }
>>> +    return ra;
>>> +}
>>> +
>>
>> You don't need env as an argument; it's unused.
>>
>> Why is all of this specific to ppc64?  Can't you run an ISA2.06B machine in
>> 32-bit mode?
> 
> bpermd is a 64-bit instruction.  32-bit implementations do not have it.

What has that got to do with running a 64-bit chip in 32-bit mode?


r~

  reply	other threads:[~2013-12-30 14:49 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-18 20:48 [Qemu-devel] [V3 PATCH 00/14] target-ppc: Base ISA V2.06 for Power7/Power8 Tom Musta
2013-12-18 20:48 ` [Qemu-devel] [V3 PATCH 01/14] target-ppc: Add Flag for Power ISA V2.06 Tom Musta
2013-12-24 15:11   ` Richard Henderson
2013-12-18 20:48 ` [Qemu-devel] [V3 PATCH 02/14] target-ppc: Add ISA2.06 bpermd Instruction Tom Musta
2013-12-24 15:17   ` Richard Henderson
2013-12-28  0:23     ` Scott Wood
2013-12-30 14:48       ` Richard Henderson [this message]
2013-12-30 15:43         ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
2013-12-30 16:23           ` Richard Henderson
2013-12-28  0:27   ` [Qemu-devel] " Scott Wood
2013-12-18 20:48 ` [Qemu-devel] [V3 PATCH 03/14] target-ppc: Add ISA2.06 divdeu[o] Instructions Tom Musta
2013-12-24 15:20   ` Richard Henderson
2013-12-28  0:30   ` [Qemu-devel] [Qemu-ppc] " Scott Wood
2014-01-03 19:24     ` Tom Musta
2014-01-03 19:43       ` Scott Wood
2013-12-18 20:48 ` [Qemu-devel] [V3 PATCH 04/14] target-ppc: Add ISA2.06 divde[o] Instructions Tom Musta
2013-12-24 15:22   ` Richard Henderson
2013-12-18 20:48 ` [Qemu-devel] [V3 PATCH 05/14] target-ppc: Add ISA 2.06 divwe[u][o] Instructions Tom Musta
2013-12-24 15:26   ` Richard Henderson
2013-12-18 20:48 ` [Qemu-devel] [V3 PATCH 06/14] target-ppc: Add ISA2.06 lbarx, lharx Instructions Tom Musta
2013-12-24 15:28   ` Richard Henderson
2013-12-18 20:49 ` [Qemu-devel] [V3 PATCH 07/14] target-ppc: Add ISA 2.06 stbcx. and sthcx. Instructions Tom Musta
2013-12-24 15:31   ` Richard Henderson
2013-12-18 20:49 ` [Qemu-devel] [V3 PATCH 08/14] target-ppc: Add ISA2.06 Float to Integer Instructions Tom Musta
2013-12-24 15:36   ` Richard Henderson
2013-12-18 20:49 ` [Qemu-devel] [V3 PATCH 09/14] target-ppc: Add ISA 2.06 fcfid[u][s] Instructions Tom Musta
2013-12-24 15:41   ` Richard Henderson
2013-12-18 20:49 ` [Qemu-devel] [V3 PATCH 10/14] target-ppc: Fix and enable fri[mnpz] Tom Musta
2013-12-24 16:02   ` Richard Henderson
2014-01-06 20:06     ` Tom Musta
2013-12-18 20:49 ` [Qemu-devel] [V3 PATCH 11/14] target-ppc: Add ISA 2.06 ftdiv Instruction Tom Musta
2013-12-24 16:06   ` Richard Henderson
2013-12-18 20:49 ` [Qemu-devel] [V3 PATCH 12/14] target-ppc: Add ISA 2.06 ftsqrt Tom Musta
2013-12-24 16:07   ` Richard Henderson
2013-12-18 20:49 ` [Qemu-devel] [V3 PATCH 13/14] target-ppc: Enable frsqrtes on Power7 and Power8 Tom Musta
2013-12-24 16:07   ` Richard Henderson
2013-12-18 20:49 ` [Qemu-devel] [V3 PATCH 14/14] target-ppc: Add ISA2.06 lfiwzx Instruction Tom Musta
2013-12-24 16:09   ` Richard Henderson

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