From: Richard Henderson <rth@twiddle.net>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: patches@linaro.org, "Michael Matz" <matz@suse.de>,
"Alexander Graf" <agraf@suse.de>,
"Claudio Fontana" <claudio.fontana@linaro.org>,
"Dirk Mueller" <dmueller@suse.de>,
"Will Newton" <will.newton@linaro.org>,
"Laurent Desnogues" <laurent.desnogues@gmail.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
kvmarm@lists.cs.columbia.edu,
"Christoffer Dall" <christoffer.dall@linaro.org>
Subject: Re: [Qemu-devel] [PATCH 01/10] target-arm: A64: Add support for dumping AArch64 VFP register state
Date: Mon, 30 Dec 2013 06:58:52 -0800 [thread overview]
Message-ID: <52C18A2C.4020705@twiddle.net> (raw)
In-Reply-To: <1388267351-31818-2-git-send-email-peter.maydell@linaro.org>
On 12/28/2013 01:49 PM, Peter Maydell wrote:
> + uint64_t vlo = float64_val(env->vfp.regs[i * 2]);
> + uint64_t vhi = float64_val(env->vfp.regs[(i * 2) + 1]);
> + cpu_fprintf(f, "q%02d.0=%016" PRIx64 ":%016" PRIx64 " ",
> + i, vlo, vhi);
Why print them lo:hi instead of, what would seem to me, the more natural hi:lo.
And what's that .0 qualifier doing on the end of an integer print field?
r~
next prev parent reply other threads:[~2013-12-30 14:59 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-28 21:49 [Qemu-devel] [PATCH 00/10] A64 decoder patchset 5: most floating point Peter Maydell
2013-12-28 21:49 ` [Qemu-devel] [PATCH 01/10] target-arm: A64: Add support for dumping AArch64 VFP register state Peter Maydell
2013-12-30 14:58 ` Richard Henderson [this message]
2013-12-30 15:21 ` Peter Maydell
2013-12-28 21:49 ` [Qemu-devel] [PATCH 02/10] target-arm: A64: Fix vector register access on bigendian hosts Peter Maydell
2013-12-30 15:03 ` Richard Henderson
2013-12-30 15:28 ` Peter Maydell
2013-12-30 15:35 ` Richard Henderson
2013-12-28 21:49 ` [Qemu-devel] [PATCH 03/10] target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum Peter Maydell
2013-12-30 15:04 ` Richard Henderson
2013-12-28 21:49 ` [Qemu-devel] [PATCH 04/10] target-arm: A64: Add "Floating-point data-processing (2 source)" insns Peter Maydell
2013-12-30 15:10 ` Richard Henderson
2013-12-28 21:49 ` [Qemu-devel] [PATCH 05/10] target-arm: A64: Add "Floating-point data-processing (3 " Peter Maydell
2013-12-30 15:15 ` Richard Henderson
2013-12-30 15:17 ` Richard Henderson
2013-12-28 21:49 ` [Qemu-devel] [PATCH 06/10] target-arm: A64: Add fmov (scalar, immediate) instruction Peter Maydell
2013-12-30 15:21 ` Richard Henderson
2013-12-28 21:49 ` [Qemu-devel] [PATCH 07/10] target-arm: A64: Add support for floating point compare Peter Maydell
2013-12-30 15:25 ` Richard Henderson
2013-12-28 21:49 ` [Qemu-devel] [PATCH 08/10] target-arm: A64: Add support for floating point conditional compare Peter Maydell
2013-12-30 15:27 ` Richard Henderson
2013-12-28 21:49 ` [Qemu-devel] [PATCH 09/10] target-arm: A64: Add support for floating point cond select Peter Maydell
2013-12-30 15:28 ` Richard Henderson
2013-12-28 21:49 ` [Qemu-devel] [PATCH 10/10] target-arm: Give the FPSCR rounding modes names Peter Maydell
2013-12-30 15:29 ` Richard Henderson
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