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Sender: Richard Henderson <rth7680@gmail.com>
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Date: Mon, 30 Dec 2013 07:10:10 -0800
From: Richard Henderson <rth@twiddle.net>
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Subject: Re: [Qemu-devel] [PATCH 04/10] target-arm: A64: Add "Floating-point
 data-processing (2 source)" insns
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To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: patches@linaro.org, Michael Matz <matz@suse.de>, Alexander Graf <agraf@suse.de>, Claudio Fontana <claudio.fontana@linaro.org>, Dirk Mueller <dmueller@suse.de>, Will Newton <will.newton@linaro.org>, Laurent Desnogues <laurent.desnogues@gmail.com>, =?ISO-8859-1?Q?Alex_Benn=E9e?= <alex.bennee@linaro.org>, kvmarm@lists.cs.columbia.edu, Christoffer Dall <christoffer.dall@linaro.org>

On 12/28/2013 01:49 PM, Peter Maydell wrote:
> From: Alexander Graf <agraf@suse.de>
> 
> This patch adds emulation for the "Floating-point data-processing (2 source)"
> group of instructions.
> 
> Signed-off-by: Alexander Graf <agraf@suse.de>
> [WN: Commit message tweak, merge single and double precision patches. Rebase
>  and update to new infrastructure. Incorporate FMIN/FMAX support patch by
>  Michael Matz.]
> Signed-off-by: Will Newton <will.newton@linaro.org>
> [PMM:
>  * added convenience accessors for FP s and d regs
>  * pulled the field decode and opcode validity check up a level]
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  target-arm/translate-a64.c | 182 ++++++++++++++++++++++++++++++++++++++++++++-
>  1 file changed, 181 insertions(+), 1 deletion(-)

Reviewed-by: Richard Henderson <rth@twiddle.net>

... and I take back what I said earlier about fp_reg_offset.  While that
specific fp store case could stand to be cleaned up to just use one 64-bit
load, the single-precision case is compelling.


r~