From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58722) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0ElK-0005gQ-8b for qemu-devel@nongnu.org; Mon, 06 Jan 2014 13:18:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W0ElF-0001Lm-HQ for qemu-devel@nongnu.org; Mon, 06 Jan 2014 13:18:54 -0500 Received: from mail-qc0-x231.google.com ([2607:f8b0:400d:c01::231]:40283) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0ElF-0001LX-Ar for qemu-devel@nongnu.org; Mon, 06 Jan 2014 13:18:49 -0500 Received: by mail-qc0-f177.google.com with SMTP id m20so17625357qcx.22 for ; Mon, 06 Jan 2014 10:18:47 -0800 (PST) Sender: Richard Henderson Message-ID: <52CAF381.1060704@twiddle.net> Date: Mon, 06 Jan 2014 10:18:41 -0800 From: Richard Henderson MIME-Version: 1.0 References: <1389013881-15726-1-git-send-email-peter.maydell@linaro.org> <1389013881-15726-2-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1389013881-15726-2-git-send-email-peter.maydell@linaro.org> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2 01/24] softfloat: Fix exception flag handling for float32_to_float16() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell , qemu-devel@nongnu.org Cc: Tom Musta , Peter Crosthwaite , patches@linaro.org, Michael Matz , Alexander Graf , Claudio Fontana , Dirk Mueller , Will Newton , Laurent Desnogues , =?ISO-8859-1?Q?Alex_Benn=E9e?= , kvmarm@lists.cs.columbia.edu, Christoffer Dall On 01/06/2014 05:10 AM, Peter Maydell wrote: > Our float32 to float16 conversion routine was generating the correct > numerical answers, but not always setting the right set of exception > flags. Fix this, mostly by rearranging the code to more closely > resemble RoundAndPackFloat*, and in particular: > * non-IEEE halfprec always raises Invalid for input NaNs > * we need to check for the overflow case before underflow > * we weren't getting the tininess-detected-after-rounding > case correct (somewhat academic since only ARM uses halfprec > and it is always tininess-detected-before-rounding) > * non-IEEE halfprec overflow raises only Invalid, not > Invalid + Inexact > * we weren't setting Inexact when we should > > Also add some clarifying comments about what the code is doing. > > Signed-off-by: Peter Maydell > --- > fpu/softfloat.c | 105 +++++++++++++++++++++++++++++++++++--------------------- > 1 file changed, 66 insertions(+), 39 deletions(-) Reviewed-by: Richard Henderson r~