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Sender: Richard Henderson <rth7680@gmail.com>
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Date: Mon, 06 Jan 2014 10:47:50 -0800
From: Richard Henderson <rth@twiddle.net>
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Subject: Re: [Qemu-devel] [PATCH v2 22/24] target-arm: A64: Add
 floating-point<->integer conversion instructions
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To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: Tom Musta <tommusta@gmail.com>, Peter Crosthwaite <peter.crosthwaite@xilinx.com>, patches@linaro.org, Michael Matz <matz@suse.de>, Alexander Graf <agraf@suse.de>, Claudio Fontana <claudio.fontana@linaro.org>, Dirk Mueller <dmueller@suse.de>, Will Newton <will.newton@linaro.org>, Laurent Desnogues <laurent.desnogues@gmail.com>, =?ISO-8859-1?Q?Alex_Benn=E9e?= <alex.bennee@linaro.org>, kvmarm@lists.cs.columbia.edu, Christoffer Dall <christoffer.dall@linaro.org>

On 01/06/2014 05:11 AM, Peter Maydell wrote:
> From: Will Newton <will.newton@linaro.org>
> 
> Add support for the AArch64 floating-point <-> integer conversion
> instructions to disas_fpintconv. In the process we can rearrange
> and simplify the detection of unallocated encodings a little.
> We also correct a typo in the instruction encoding diagram for this
> instruction group: bit 21 is 1, not 0.
> 
> Signed-off-by: Will Newton <will.newton@linaro.org>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  target-arm/translate-a64.c | 23 ++++++++++++++++++++---
>  1 file changed, 20 insertions(+), 3 deletions(-)

Reviewed-by: Richard Henderson <rth@twiddle.net>


r~