From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52373) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W2Urw-0007XH-PU for qemu-devel@nongnu.org; Sun, 12 Jan 2014 18:55:15 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W2Urq-0002xt-Sm for qemu-devel@nongnu.org; Sun, 12 Jan 2014 18:55:04 -0500 Received: from cantor2.suse.de ([195.135.220.15]:34447 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W2Urq-0002xm-Lq for qemu-devel@nongnu.org; Sun, 12 Jan 2014 18:54:58 -0500 Message-ID: <52D32B4D.1070205@suse.de> Date: Mon, 13 Jan 2014 00:54:53 +0100 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <0dcbbf9ba6301afde428928238a06615cf936fd0.1389326614.git.alistair.francis@xilinx.com> In-Reply-To: <0dcbbf9ba6301afde428928238a06615cf936fd0.1389326614.git.alistair.francis@xilinx.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH arm-midr v1 1/2] ARM: Convert MIDR to a property List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, peter.crosthwaite@xilinx.com Am 13.01.2014 00:33, schrieb Alistair Francis: > Convert the MIDR register to a property. This allows boards to later se= t > a custom MIDR value. This has been done in such a way to maintain > compatibility with all existing CPUs and boards >=20 > Signed-off-by: Alistair Francis > --- > I added the properties to the cpu->midr variable in a similar method to > how Peter Crosthwaite did in his 'Fix Support for ARM CBAR and > reset-hivecs' series. >=20 > target-arm/cpu.c | 17 +++++++++++++++++ > 1 files changed, 17 insertions(+), 0 deletions(-) >=20 > diff --git a/target-arm/cpu.c b/target-arm/cpu.c > index 408d207..bf625b0 100644 > --- a/target-arm/cpu.c > +++ b/target-arm/cpu.c > @@ -249,10 +249,14 @@ static Property arm_cpu_reset_cbar_property =3D > static Property arm_cpu_reset_hivecs_property =3D > DEFINE_PROP_BOOL("reset-hivecs", ARMCPU, reset_hivecs, fal= se); > =20 > +static Property arm_cpu_midr_property =3D > + DEFINE_PROP_UINT32("midr", ARMCPU, midr, 0); > + > static void arm_cpu_post_init(Object *obj) > { > ARMCPU *cpu =3D ARM_CPU(obj); > Error *err =3D NULL; > + uint32_t temp =3D cpu->midr; > =20 > if (arm_feature(&cpu->env, ARM_FEATURE_CBAR)) { > qdev_property_add_static(DEVICE(obj), &arm_cpu_reset_cbar_prop= erty, > @@ -265,6 +269,19 @@ static void arm_cpu_post_init(Object *obj) > &err); > assert_no_error(err); > } > + > + /* > + * Initialise the midr property and set it to the original CPU MID= R > + * This is used to maintain compatibility with boards that don't s= et > + * a custom MIDR > + */ > + qdev_property_add_static(DEVICE(obj), &arm_cpu_midr_property, &err= ); This looks wrong to me. Use dc->props to add properties that are always present. Any qdev_* functions shouldn't spread further than necessary. > + assert_no_error(err); Further, this seems to conflict with Peter C.'s work of introducing error_abort. Andreas > + object_property_set_int(OBJECT(cpu), temp, "midr", &err); > + if (err) { > + error_report("%s", error_get_pretty(err)); > + exit(1); > + } > } > =20 > static void arm_cpu_finalizefn(Object *obj) >=20 --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg