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Sender: Richard Henderson <rth7680@gmail.com>
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Date: Tue, 21 Jan 2014 13:42:31 -0800
From: Richard Henderson <rth@twiddle.net>
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Subject: Re: [Qemu-devel] [PATCH 0/8] target-arm: A64 Neon instructions,
	set 2
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To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: patches@linaro.org, Michael Matz <matz@suse.de>, Alexander Graf <agraf@suse.de>, Claudio Fontana <claudio.fontana@linaro.org>, Dirk Mueller <dmueller@suse.de>, Will Newton <will.newton@linaro.org>, Laurent Desnogues <laurent.desnogues@gmail.com>, =?UTF-8?B?QWxleCBCZW5uw6ll?= <alex.bennee@linaro.org>, kvmarm@lists.cs.columbia.edu, Christoffer Dall <christoffer.dall@linaro.org>

On 01/17/2014 10:44 AM, Peter Maydell wrote:
> Alex Bennée (2):
>   target-arm: A64: Add logic ops from SIMD 3 same group
>   target-arm: A64: Add SIMD shift by immediate
> 
> Peter Maydell (6):
>   target-arm: A64: Add SIMD three-different multiply accumulate insns
>   target-arm: A64: Add SIMD three-different ABDL instructions
>   target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops
>   target-arm: A64: Add top level decode for SIMD 3-same group
>   target-arm: A64: Add integer ops from SIMD 3-same group
>   target-arm: A64: Add simple SIMD 3-same floating point ops

I've responded with individual tweaks to some of the patches,
but I saw nothing actually incorrect in any in any of them, so,

Reviewed-by: Richard Henderson <rth@twiddle.net>


r~