From: Xbing Wang <xbing6list@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>,
Richard Henderson <rth@twiddle.net>
Cc: "Laurent Desnogues" <laurent.desnogues@gmail.com>,
"Patch Tracking" <patches@linaro.org>,
"Michael Matz" <matz@suse.de>,
"QEMU Developers" <qemu-devel@nongnu.org>,
"Alexander Graf" <agraf@suse.de>,
"Claudio Fontana" <claudio.fontana@linaro.org>,
"Dirk Mueller" <dmueller@suse.de>,
"Will Newton" <will.newton@linaro.org>,
"Alex Bennée" <alex.bennee@linaro.org>,
"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
"Christoffer Dall" <christoffer.dall@linaro.org>
Subject: Re: [Qemu-devel] [PATCH 6/8] target-arm: A64: Add integer ops from SIMD 3-same group
Date: Wed, 22 Jan 2014 12:59:27 +0800 [thread overview]
Message-ID: <52DF502F.8090903@gmail.com> (raw)
In-Reply-To: <CAFEAcA8_Ey-10PzFE+9qLJDFWb4WtXDXoHdu9mztr8_jr1i4pA@mail.gmail.com>
Making them static makes this function NOT thread-safe (and they're
hidden in thousands of lines of codes), there will be boys who want the
whole file translate-a64.c to be thread-safe. What do you think?
Thanks.
- xbing
On 01/22/2014 03:53 AM, Peter Maydell wrote:
> On 21 January 2014 19:37, Richard Henderson <rth@twiddle.net> wrote:
>> On 01/17/2014 10:44 AM, Peter Maydell wrote:
>>> + NeonGenFn *ceqtstfns[3][2] = {
>> You want all of these arrays to be static and const:
>>
>> static NeonGenFn * const ceqtstfns[3][2] = ...
> I confess I couldn't figure out the right place to
> put the 'const' to placate the compiler :-)
>
> thanks
> -- PMM
>
>
next prev parent reply other threads:[~2014-01-22 4:59 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-17 18:44 [Qemu-devel] [PATCH 0/8] target-arm: A64 Neon instructions, set 2 Peter Maydell
2014-01-17 18:44 ` [Qemu-devel] [PATCH 1/8] target-arm: A64: Add SIMD three-different multiply accumulate insns Peter Maydell
2014-01-17 18:44 ` [Qemu-devel] [PATCH 2/8] target-arm: A64: Add SIMD three-different ABDL instructions Peter Maydell
2014-01-17 18:44 ` [Qemu-devel] [PATCH 3/8] target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops Peter Maydell
2014-01-21 19:26 ` Richard Henderson
2014-01-17 18:44 ` [Qemu-devel] [PATCH 4/8] target-arm: A64: Add top level decode for SIMD 3-same group Peter Maydell
2014-01-17 18:44 ` [Qemu-devel] [PATCH 5/8] target-arm: A64: Add logic ops from SIMD 3 same group Peter Maydell
2014-01-21 19:35 ` Richard Henderson
2014-01-17 18:44 ` [Qemu-devel] [PATCH 6/8] target-arm: A64: Add integer ops from SIMD 3-same group Peter Maydell
2014-01-21 19:37 ` Richard Henderson
2014-01-21 19:53 ` Peter Maydell
2014-01-22 4:59 ` Xbing Wang [this message]
2014-01-22 6:13 ` Richard Henderson
2014-01-22 6:48 ` Xbing Wang
2014-01-21 19:40 ` Richard Henderson
2014-01-17 18:44 ` [Qemu-devel] [PATCH 7/8] target-arm: A64: Add simple SIMD 3-same floating point ops Peter Maydell
2014-01-17 18:44 ` [Qemu-devel] [PATCH 8/8] target-arm: A64: Add SIMD shift by immediate Peter Maydell
2014-01-21 21:43 ` Richard Henderson
2014-01-21 21:42 ` [Qemu-devel] [PATCH 0/8] target-arm: A64 Neon instructions, set 2 Richard Henderson
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