* [Qemu-devel] [PATCH 0/3] Hyper-V parameters
@ 2014-01-21 8:02 Vadim Rozenfeld
2014-01-21 8:02 ` [Qemu-devel] [PATCH 1/3] cleanup hyper-v interface initialization Vadim Rozenfeld
` (2 more replies)
0 siblings, 3 replies; 9+ messages in thread
From: Vadim Rozenfeld @ 2014-01-21 8:02 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mtosatti, pl, Vadim Rozenfeld, aliguori
From: Vadim Rozenfeld <vrozenfeld@gamil.com>
This series conists of three patches and addresses
the following issues:
- adjusting hyperv parameters according to MS requirements
http://msdn.microsoft.com/library/windows/hardware/hh975392
- make hyperv hypercall and vapic pages migratable
- add support for enabling hyperv reference counters
Vadim Rozenfeld (3):
cleanup hyper-v interface initialization
make hyperv hypercall, vapic, and os id MSRs migratable
add support for hyperv time parameter
linux-headers/asm-x86/hyperv.h | 3 ++
linux-headers/linux/kvm.h | 1 +
target-i386/cpu-qom.h | 1 +
target-i386/cpu.c | 1 +
target-i386/cpu.h | 5 +++
target-i386/kvm.c | 95 +++++++++++++++++++++++++++---------------
target-i386/machine.c | 25 +++++++++++
7 files changed, 97 insertions(+), 34 deletions(-)
--
1.8.3.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Qemu-devel] [PATCH 1/3] cleanup hyper-v interface initialization
2014-01-21 8:02 [Qemu-devel] [PATCH 0/3] Hyper-V parameters Vadim Rozenfeld
@ 2014-01-21 8:02 ` Vadim Rozenfeld
2014-01-21 10:14 ` Paolo Bonzini
2014-01-21 8:02 ` [Qemu-devel] [PATCH 2/3] make hyperv hypercall, vapic, and os id MSRs migratable Vadim Rozenfeld
2014-01-21 8:02 ` [Qemu-devel] [PATCH 3/3] add support for hyperv time parameter Vadim Rozenfeld
2 siblings, 1 reply; 9+ messages in thread
From: Vadim Rozenfeld @ 2014-01-21 8:02 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mtosatti, pl, Vadim Rozenfeld, aliguori
Signed-off-by: Vadim Rozenfeld <vrozenfe@redhat.com>
---
target-i386/kvm.c | 46 +++++++++++++++++-----------------------------
1 file changed, 17 insertions(+), 29 deletions(-)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 7522e98..768ca1d 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -71,6 +71,8 @@ static bool has_msr_pv_eoi_en;
static bool has_msr_misc_enable;
static bool has_msr_kvm_steal_time;
static int lm_capable_kernel;
+static bool has_msr_hv_hypercall;
+static bool has_msr_hv_vapic;
static bool has_msr_architectural_pmu;
static uint32_t num_architectural_pmu_counters;
@@ -463,13 +465,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
/* Paravirtualization CPUIDs */
c = &cpuid_data.entries[cpuid_i++];
c->function = KVM_CPUID_SIGNATURE;
- if (!hyperv_enabled(cpu)) {
- memcpy(signature, "KVMKVMKVM\0\0\0", 12);
- c->eax = 0;
- } else {
- memcpy(signature, "Microsoft Hv", 12);
- c->eax = HYPERV_CPUID_MIN;
- }
+ memcpy(signature, "KVMKVMKVM\0\0\0", 12);
c->ebx = signature[0];
c->ecx = signature[1];
c->edx = signature[2];
@@ -478,23 +474,23 @@ int kvm_arch_init_vcpu(CPUState *cs)
c->function = KVM_CPUID_FEATURES;
c->eax = env->features[FEAT_KVM];
- if (hyperv_enabled(cpu)) {
+ if (hyperv_enabled(cpu) &&
+ kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV) > 0) {
+ has_msr_hv_hypercall = true;
+
memcpy(signature, "Hv#1\0\0\0\0\0\0\0\0", 12);
c->eax = signature[0];
c = &cpuid_data.entries[cpuid_i++];
- c->function = HYPERV_CPUID_VERSION;
- c->eax = 0x00001bbc;
- c->ebx = 0x00060001;
-
- c = &cpuid_data.entries[cpuid_i++];
c->function = HYPERV_CPUID_FEATURES;
if (cpu->hyperv_relaxed_timing) {
c->eax |= HV_X64_MSR_HYPERCALL_AVAILABLE;
}
- if (cpu->hyperv_vapic) {
+ if (cpu->hyperv_vapic &&
+ kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV_VAPIC) > 0) {
c->eax |= HV_X64_MSR_HYPERCALL_AVAILABLE;
c->eax |= HV_X64_MSR_APIC_ACCESS_AVAILABLE;
+ has_msr_hv_vapic = true;
}
c = &cpuid_data.entries[cpuid_i++];
@@ -502,23 +498,15 @@ int kvm_arch_init_vcpu(CPUState *cs)
if (cpu->hyperv_relaxed_timing) {
c->eax |= HV_X64_RELAXED_TIMING_RECOMMENDED;
}
- if (cpu->hyperv_vapic) {
+ if (has_msr_hv_vapic) {
c->eax |= HV_X64_APIC_ACCESS_RECOMMENDED;
}
- c->ebx = cpu->hyperv_spinlock_attempts;
-
- c = &cpuid_data.entries[cpuid_i++];
- c->function = HYPERV_CPUID_IMPLEMENT_LIMITS;
- c->eax = 0x40;
- c->ebx = 0x40;
-
- c = &cpuid_data.entries[cpuid_i++];
- c->function = KVM_CPUID_SIGNATURE_NEXT;
- memcpy(signature, "KVMKVMKVM\0\0\0", 12);
- c->eax = 0;
- c->ebx = signature[0];
- c->ecx = signature[1];
- c->edx = signature[2];
+ if (cpu->hyperv_spinlock_attempts != HYPERV_SPINLOCK_NEVER_RETRY &&
+ kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV_SPIN) > 0) {
+ c->ebx = cpu->hyperv_spinlock_attempts;
+ } else {
+ c->ebx = HYPERV_SPINLOCK_NEVER_RETRY;
+ }
}
has_msr_async_pf_en = c->eax & (1 << KVM_FEATURE_ASYNC_PF);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Qemu-devel] [PATCH 2/3] make hyperv hypercall, vapic, and os id MSRs migratable
2014-01-21 8:02 [Qemu-devel] [PATCH 0/3] Hyper-V parameters Vadim Rozenfeld
2014-01-21 8:02 ` [Qemu-devel] [PATCH 1/3] cleanup hyper-v interface initialization Vadim Rozenfeld
@ 2014-01-21 8:02 ` Vadim Rozenfeld
2014-01-21 10:17 ` Paolo Bonzini
2014-01-21 8:02 ` [Qemu-devel] [PATCH 3/3] add support for hyperv time parameter Vadim Rozenfeld
2 siblings, 1 reply; 9+ messages in thread
From: Vadim Rozenfeld @ 2014-01-21 8:02 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mtosatti, pl, Vadim Rozenfeld, aliguori
Signed-off-by: Vadim Rozenfeld <vrozenfe@redhat.com>
---
target-i386/cpu.h | 4 ++++
target-i386/kvm.c | 30 +++++++++++++++++++++++++-----
target-i386/machine.c | 24 ++++++++++++++++++++++++
3 files changed, 53 insertions(+), 5 deletions(-)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 1d94a9d..6eeafdc 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -847,6 +847,10 @@ typedef struct CPUX86State {
uint64_t msr_gp_counters[MAX_GP_COUNTERS];
uint64_t msr_gp_evtsel[MAX_GP_COUNTERS];
+ uint64_t msr_hv_hypercall;
+ uint64_t msr_hv_guest_os_id;
+ uint64_t msr_hv_vapic;
+
/* exception/interrupt handling */
int error_code;
int exception_is_int;
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 768ca1d..5152e64 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1185,12 +1185,15 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
kvm_msr_entry_set(&msrs[n++], MSR_CORE_PERF_GLOBAL_CTRL,
env->msr_global_ctrl);
}
- if (hyperv_hypercall_available(cpu)) {
- kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_GUEST_OS_ID, 0);
- kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_HYPERCALL, 0);
+ if (has_msr_hv_hypercall) {
+ kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_GUEST_OS_ID,
+ env->msr_hv_guest_os_id);
+ kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_HYPERCALL,
+ env->msr_hv_hypercall);
}
- if (cpu->hyperv_vapic) {
- kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_APIC_ASSIST_PAGE, 0);
+ if (has_msr_hv_vapic) {
+ kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_APIC_ASSIST_PAGE,
+ env->msr_hv_vapic);
}
if (has_msr_feature_control) {
kvm_msr_entry_set(&msrs[n++], MSR_IA32_FEATURE_CONTROL,
@@ -1470,6 +1473,14 @@ static int kvm_get_msrs(X86CPU *cpu)
}
}
+ if (has_msr_hv_hypercall) {
+ msrs[n++].index = HV_X64_MSR_HYPERCALL;
+ msrs[n++].index = HV_X64_MSR_GUEST_OS_ID;
+ }
+ if (has_msr_hv_vapic) {
+ msrs[n++].index = HV_X64_MSR_APIC_ASSIST_PAGE;
+ }
+
msr_data.info.nmsrs = n;
ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MSRS, &msr_data);
if (ret < 0) {
@@ -1574,6 +1585,15 @@ static int kvm_get_msrs(X86CPU *cpu)
case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL0 + MAX_GP_COUNTERS - 1:
env->msr_gp_evtsel[index - MSR_P6_EVNTSEL0] = msrs[i].data;
break;
+ case HV_X64_MSR_HYPERCALL:
+ env->msr_hv_hypercall = msrs[i].data;
+ break;
+ case HV_X64_MSR_GUEST_OS_ID:
+ env->msr_hv_guest_os_id = msrs[i].data;
+ break;
+ case HV_X64_MSR_APIC_ASSIST_PAGE:
+ env->msr_hv_vapic = msrs[i].data;
+ break;
}
}
diff --git a/target-i386/machine.c b/target-i386/machine.c
index e568da2..58c5b45 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -506,6 +506,27 @@ static const VMStateDescription vmstate_msr_architectural_pmu = {
}
};
+static bool hyperv_enable_needed(void *opaque)
+{
+ X86CPU *cpu = opaque;
+ CPUX86State *env = &cpu->env;
+
+ return env->msr_hv_hypercall != 0;
+}
+
+static const VMStateDescription vmstate_msr_hyperv = {
+ .name = "cpu/msr_hyperv",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .minimum_version_id_old = 1,
+ .fields = (VMStateField []) {
+ VMSTATE_UINT64(env.msr_hv_hypercall, X86CPU),
+ VMSTATE_UINT64(env.msr_hv_guest_os_id, X86CPU),
+ VMSTATE_UINT64(env.msr_hv_vapic, X86CPU),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
const VMStateDescription vmstate_x86_cpu = {
.name = "cpu",
.version_id = 12,
@@ -637,6 +658,9 @@ const VMStateDescription vmstate_x86_cpu = {
}, {
.vmsd = &vmstate_msr_architectural_pmu,
.needed = pmu_enable_needed,
+ }, {
+ .vmsd = &vmstate_msr_hyperv,
+ .needed = hyperv_enable_needed,
} , {
/* empty */
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Qemu-devel] [PATCH 3/3] add support for hyperv time parameter
2014-01-21 8:02 [Qemu-devel] [PATCH 0/3] Hyper-V parameters Vadim Rozenfeld
2014-01-21 8:02 ` [Qemu-devel] [PATCH 1/3] cleanup hyper-v interface initialization Vadim Rozenfeld
2014-01-21 8:02 ` [Qemu-devel] [PATCH 2/3] make hyperv hypercall, vapic, and os id MSRs migratable Vadim Rozenfeld
@ 2014-01-21 8:02 ` Vadim Rozenfeld
2014-01-21 10:21 ` Paolo Bonzini
2 siblings, 1 reply; 9+ messages in thread
From: Vadim Rozenfeld @ 2014-01-21 8:02 UTC (permalink / raw)
To: qemu-devel
Cc: pl, mtosatti, Vadim Rozenfeld, Vadim Rozenfeld, aliguori,
pbonzini
From: Vadim Rozenfeld <vrozenfeld@gamil.com>
Signed-off-by: Vadim Rozenfeld <vrozenfe@redhat.com>
---
| 3 +++
| 1 +
target-i386/cpu-qom.h | 1 +
target-i386/cpu.c | 1 +
target-i386/cpu.h | 1 +
target-i386/kvm.c | 19 +++++++++++++++++++
target-i386/machine.c | 1 +
7 files changed, 27 insertions(+)
--git a/linux-headers/asm-x86/hyperv.h b/linux-headers/asm-x86/hyperv.h
index b8f1c01..3b400ee 100644
--- a/linux-headers/asm-x86/hyperv.h
+++ b/linux-headers/asm-x86/hyperv.h
@@ -149,6 +149,9 @@
/* MSR used to read the per-partition time reference counter */
#define HV_X64_MSR_TIME_REF_COUNT 0x40000020
+/* A partition's reference time stamp counter (TSC) page */
+#define HV_X64_MSR_REFERENCE_TSC 0x40000021
+
/* MSR used to retrieve the TSC frequency */
#define HV_X64_MSR_TSC_FREQUENCY 0x40000022
--git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index 5a49671..999fb13 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/linux/kvm.h
@@ -674,6 +674,7 @@ struct kvm_ppc_smmu_info {
#define KVM_CAP_ARM_EL1_32BIT 93
#define KVM_CAP_SPAPR_MULTITCE 94
#define KVM_CAP_EXT_EMUL_CPUID 95
+#define KVM_CAP_HYPERV_TIME 96
#ifdef KVM_CAP_IRQ_ROUTING
diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h
index d1751a4..722f11a 100644
--- a/target-i386/cpu-qom.h
+++ b/target-i386/cpu-qom.h
@@ -69,6 +69,7 @@ typedef struct X86CPU {
bool hyperv_vapic;
bool hyperv_relaxed_timing;
int hyperv_spinlock_attempts;
+ bool hyperv_time;
bool check_cpuid;
bool enforce_cpuid;
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 0eea8c7..ff3290c 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2744,6 +2744,7 @@ static Property x86_cpu_properties[] = {
{ .name = "hv-spinlocks", .info = &qdev_prop_spinlocks },
DEFINE_PROP_BOOL("hv-relaxed", X86CPU, hyperv_relaxed_timing, false),
DEFINE_PROP_BOOL("hv-vapic", X86CPU, hyperv_vapic, false),
+ DEFINE_PROP_BOOL("hv-time", X86CPU, hyperv_time, false),
DEFINE_PROP_BOOL("check", X86CPU, check_cpuid, false),
DEFINE_PROP_BOOL("enforce", X86CPU, enforce_cpuid, false),
DEFINE_PROP_END_OF_LIST()
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 6eeafdc..f7d7689 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -850,6 +850,7 @@ typedef struct CPUX86State {
uint64_t msr_hv_hypercall;
uint64_t msr_hv_guest_os_id;
uint64_t msr_hv_vapic;
+ uint64_t msr_hv_tsc;
/* exception/interrupt handling */
int error_code;
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 5152e64..75ebc5d 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -73,6 +73,7 @@ static bool has_msr_kvm_steal_time;
static int lm_capable_kernel;
static bool has_msr_hv_hypercall;
static bool has_msr_hv_vapic;
+static bool has_msr_hv_tsc;
static bool has_msr_architectural_pmu;
static uint32_t num_architectural_pmu_counters;
@@ -433,6 +434,7 @@ unsigned long kvm_arch_vcpu_id(CPUState *cs)
static bool hyperv_hypercall_available(X86CPU *cpu)
{
return cpu->hyperv_vapic ||
+ cpu->hyperv_time ||
(cpu->hyperv_spinlock_attempts != HYPERV_SPINLOCK_NEVER_RETRY);
}
@@ -492,6 +494,13 @@ int kvm_arch_init_vcpu(CPUState *cs)
c->eax |= HV_X64_MSR_APIC_ACCESS_AVAILABLE;
has_msr_hv_vapic = true;
}
+ if (cpu->hyperv_time &&
+ kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV_TIME) > 0) {
+ c->eax |= HV_X64_MSR_HYPERCALL_AVAILABLE;
+ c->eax |= HV_X64_MSR_TIME_REF_COUNT_AVAILABLE;
+ c->eax |= 0x200;
+ has_msr_hv_tsc = true;
+ }
c = &cpuid_data.entries[cpuid_i++];
c->function = HYPERV_CPUID_ENLIGHTMENT_INFO;
@@ -1195,6 +1204,10 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_APIC_ASSIST_PAGE,
env->msr_hv_vapic);
}
+ if (has_msr_hv_tsc) {
+ kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_REFERENCE_TSC,
+ env->msr_hv_tsc);
+ }
if (has_msr_feature_control) {
kvm_msr_entry_set(&msrs[n++], MSR_IA32_FEATURE_CONTROL,
env->msr_ia32_feature_control);
@@ -1480,6 +1493,9 @@ static int kvm_get_msrs(X86CPU *cpu)
if (has_msr_hv_vapic) {
msrs[n++].index = HV_X64_MSR_APIC_ASSIST_PAGE;
}
+ if (has_msr_hv_tsc) {
+ msrs[n++].index = HV_X64_MSR_REFERENCE_TSC;
+ }
msr_data.info.nmsrs = n;
ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MSRS, &msr_data);
@@ -1594,6 +1610,9 @@ static int kvm_get_msrs(X86CPU *cpu)
case HV_X64_MSR_APIC_ASSIST_PAGE:
env->msr_hv_vapic = msrs[i].data;
break;
+ case HV_X64_MSR_REFERENCE_TSC:
+ env->msr_hv_tsc = msrs[i].data;
+ break;
}
}
diff --git a/target-i386/machine.c b/target-i386/machine.c
index 58c5b45..9e9a001 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -523,6 +523,7 @@ static const VMStateDescription vmstate_msr_hyperv = {
VMSTATE_UINT64(env.msr_hv_hypercall, X86CPU),
VMSTATE_UINT64(env.msr_hv_guest_os_id, X86CPU),
VMSTATE_UINT64(env.msr_hv_vapic, X86CPU),
+ VMSTATE_UINT64(env.msr_hv_tsc, X86CPU),
VMSTATE_END_OF_LIST()
}
};
--
1.8.3.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] [PATCH 1/3] cleanup hyper-v interface initialization
2014-01-21 8:02 ` [Qemu-devel] [PATCH 1/3] cleanup hyper-v interface initialization Vadim Rozenfeld
@ 2014-01-21 10:14 ` Paolo Bonzini
0 siblings, 0 replies; 9+ messages in thread
From: Paolo Bonzini @ 2014-01-21 10:14 UTC (permalink / raw)
To: Vadim Rozenfeld; +Cc: mtosatti, pl, qemu-devel, aliguori
Il 21/01/2014 09:02, Vadim Rozenfeld ha scritto:
> Signed-off-by: Vadim Rozenfeld <vrozenfe@redhat.com>
> ---
> target-i386/kvm.c | 46 +++++++++++++++++-----------------------------
> 1 file changed, 17 insertions(+), 29 deletions(-)
Please split this part into multiple parts and document each in the
commit message.
Also please cite relevant parts of the MS document in the commit messages.
Paolo
> diff --git a/target-i386/kvm.c b/target-i386/kvm.c
> index 7522e98..768ca1d 100644
> --- a/target-i386/kvm.c
> +++ b/target-i386/kvm.c
> @@ -71,6 +71,8 @@ static bool has_msr_pv_eoi_en;
> static bool has_msr_misc_enable;
> static bool has_msr_kvm_steal_time;
> static int lm_capable_kernel;
> +static bool has_msr_hv_hypercall;
> +static bool has_msr_hv_vapic;
>
> static bool has_msr_architectural_pmu;
> static uint32_t num_architectural_pmu_counters;
> @@ -463,13 +465,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
> /* Paravirtualization CPUIDs */
> c = &cpuid_data.entries[cpuid_i++];
> c->function = KVM_CPUID_SIGNATURE;
> - if (!hyperv_enabled(cpu)) {
> - memcpy(signature, "KVMKVMKVM\0\0\0", 12);
> - c->eax = 0;
> - } else {
> - memcpy(signature, "Microsoft Hv", 12);
> - c->eax = HYPERV_CPUID_MIN;
> - }
> + memcpy(signature, "KVMKVMKVM\0\0\0", 12);
> c->ebx = signature[0];
> c->ecx = signature[1];
> c->edx = signature[2];
> @@ -478,23 +474,23 @@ int kvm_arch_init_vcpu(CPUState *cs)
> c->function = KVM_CPUID_FEATURES;
> c->eax = env->features[FEAT_KVM];
>
> - if (hyperv_enabled(cpu)) {
> + if (hyperv_enabled(cpu) &&
> + kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV) > 0) {
> + has_msr_hv_hypercall = true;
> +
> memcpy(signature, "Hv#1\0\0\0\0\0\0\0\0", 12);
> c->eax = signature[0];
>
> c = &cpuid_data.entries[cpuid_i++];
> - c->function = HYPERV_CPUID_VERSION;
> - c->eax = 0x00001bbc;
> - c->ebx = 0x00060001;
> -
> - c = &cpuid_data.entries[cpuid_i++];
> c->function = HYPERV_CPUID_FEATURES;
> if (cpu->hyperv_relaxed_timing) {
> c->eax |= HV_X64_MSR_HYPERCALL_AVAILABLE;
> }
> - if (cpu->hyperv_vapic) {
> + if (cpu->hyperv_vapic &&
> + kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV_VAPIC) > 0) {
> c->eax |= HV_X64_MSR_HYPERCALL_AVAILABLE;
> c->eax |= HV_X64_MSR_APIC_ACCESS_AVAILABLE;
> + has_msr_hv_vapic = true;
> }
>
> c = &cpuid_data.entries[cpuid_i++];
> @@ -502,23 +498,15 @@ int kvm_arch_init_vcpu(CPUState *cs)
> if (cpu->hyperv_relaxed_timing) {
> c->eax |= HV_X64_RELAXED_TIMING_RECOMMENDED;
> }
> - if (cpu->hyperv_vapic) {
> + if (has_msr_hv_vapic) {
> c->eax |= HV_X64_APIC_ACCESS_RECOMMENDED;
> }
> - c->ebx = cpu->hyperv_spinlock_attempts;
> -
> - c = &cpuid_data.entries[cpuid_i++];
> - c->function = HYPERV_CPUID_IMPLEMENT_LIMITS;
> - c->eax = 0x40;
> - c->ebx = 0x40;
> -
> - c = &cpuid_data.entries[cpuid_i++];
> - c->function = KVM_CPUID_SIGNATURE_NEXT;
> - memcpy(signature, "KVMKVMKVM\0\0\0", 12);
> - c->eax = 0;
> - c->ebx = signature[0];
> - c->ecx = signature[1];
> - c->edx = signature[2];
> + if (cpu->hyperv_spinlock_attempts != HYPERV_SPINLOCK_NEVER_RETRY &&
> + kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV_SPIN) > 0) {
> + c->ebx = cpu->hyperv_spinlock_attempts;
> + } else {
> + c->ebx = HYPERV_SPINLOCK_NEVER_RETRY;
> + }
> }
>
> has_msr_async_pf_en = c->eax & (1 << KVM_FEATURE_ASYNC_PF);
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] [PATCH 2/3] make hyperv hypercall, vapic, and os id MSRs migratable
2014-01-21 8:02 ` [Qemu-devel] [PATCH 2/3] make hyperv hypercall, vapic, and os id MSRs migratable Vadim Rozenfeld
@ 2014-01-21 10:17 ` Paolo Bonzini
0 siblings, 0 replies; 9+ messages in thread
From: Paolo Bonzini @ 2014-01-21 10:17 UTC (permalink / raw)
To: Vadim Rozenfeld; +Cc: mtosatti, pl, qemu-devel, aliguori
Il 21/01/2014 09:02, Vadim Rozenfeld ha scritto:
> Signed-off-by: Vadim Rozenfeld <vrozenfe@redhat.com>
> ---
> target-i386/cpu.h | 4 ++++
> target-i386/kvm.c | 30 +++++++++++++++++++++++++-----
> target-i386/machine.c | 24 ++++++++++++++++++++++++
> 3 files changed, 53 insertions(+), 5 deletions(-)
>
> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> index 1d94a9d..6eeafdc 100644
> --- a/target-i386/cpu.h
> +++ b/target-i386/cpu.h
> @@ -847,6 +847,10 @@ typedef struct CPUX86State {
> uint64_t msr_gp_counters[MAX_GP_COUNTERS];
> uint64_t msr_gp_evtsel[MAX_GP_COUNTERS];
>
> + uint64_t msr_hv_hypercall;
> + uint64_t msr_hv_guest_os_id;
> + uint64_t msr_hv_vapic;
> +
> /* exception/interrupt handling */
> int error_code;
> int exception_is_int;
> diff --git a/target-i386/kvm.c b/target-i386/kvm.c
> index 768ca1d..5152e64 100644
> --- a/target-i386/kvm.c
> +++ b/target-i386/kvm.c
> @@ -1185,12 +1185,15 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
> kvm_msr_entry_set(&msrs[n++], MSR_CORE_PERF_GLOBAL_CTRL,
> env->msr_global_ctrl);
> }
> - if (hyperv_hypercall_available(cpu)) {
> - kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_GUEST_OS_ID, 0);
> - kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_HYPERCALL, 0);
> + if (has_msr_hv_hypercall) {
> + kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_GUEST_OS_ID,
> + env->msr_hv_guest_os_id);
> + kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_HYPERCALL,
> + env->msr_hv_hypercall);
> }
> - if (cpu->hyperv_vapic) {
> - kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_APIC_ASSIST_PAGE, 0);
> + if (has_msr_hv_vapic) {
> + kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_APIC_ASSIST_PAGE,
> + env->msr_hv_vapic);
> }
Changing the "if" condition should go in (one of the patches split out
of) the previous patch.
> if (has_msr_feature_control) {
> kvm_msr_entry_set(&msrs[n++], MSR_IA32_FEATURE_CONTROL,
> @@ -1470,6 +1473,14 @@ static int kvm_get_msrs(X86CPU *cpu)
> }
> }
>
> + if (has_msr_hv_hypercall) {
> + msrs[n++].index = HV_X64_MSR_HYPERCALL;
> + msrs[n++].index = HV_X64_MSR_GUEST_OS_ID;
> + }
> + if (has_msr_hv_vapic) {
> + msrs[n++].index = HV_X64_MSR_APIC_ASSIST_PAGE;
> + }
> +
> msr_data.info.nmsrs = n;
> ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MSRS, &msr_data);
> if (ret < 0) {
> @@ -1574,6 +1585,15 @@ static int kvm_get_msrs(X86CPU *cpu)
> case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL0 + MAX_GP_COUNTERS - 1:
> env->msr_gp_evtsel[index - MSR_P6_EVNTSEL0] = msrs[i].data;
> break;
> + case HV_X64_MSR_HYPERCALL:
> + env->msr_hv_hypercall = msrs[i].data;
> + break;
> + case HV_X64_MSR_GUEST_OS_ID:
> + env->msr_hv_guest_os_id = msrs[i].data;
> + break;
> + case HV_X64_MSR_APIC_ASSIST_PAGE:
> + env->msr_hv_vapic = msrs[i].data;
> + break;
> }
> }
>
> diff --git a/target-i386/machine.c b/target-i386/machine.c
> index e568da2..58c5b45 100644
> --- a/target-i386/machine.c
> +++ b/target-i386/machine.c
> @@ -506,6 +506,27 @@ static const VMStateDescription vmstate_msr_architectural_pmu = {
> }
> };
>
> +static bool hyperv_enable_needed(void *opaque)
> +{
> + X86CPU *cpu = opaque;
> + CPUX86State *env = &cpu->env;
> +
> + return env->msr_hv_hypercall != 0;
I think you should test all three MSRs. It is theoretically possible
that a guest OS writes the guest OS ID MSR first and the machine is
migrated exactly after that write.
Paolo
> +}
> +
> +static const VMStateDescription vmstate_msr_hyperv = {
> + .name = "cpu/msr_hyperv",
> + .version_id = 1,
> + .minimum_version_id = 1,
> + .minimum_version_id_old = 1,
> + .fields = (VMStateField []) {
> + VMSTATE_UINT64(env.msr_hv_hypercall, X86CPU),
> + VMSTATE_UINT64(env.msr_hv_guest_os_id, X86CPU),
> + VMSTATE_UINT64(env.msr_hv_vapic, X86CPU),
> + VMSTATE_END_OF_LIST()
> + }
> +};
> +
> const VMStateDescription vmstate_x86_cpu = {
> .name = "cpu",
> .version_id = 12,
> @@ -637,6 +658,9 @@ const VMStateDescription vmstate_x86_cpu = {
> }, {
> .vmsd = &vmstate_msr_architectural_pmu,
> .needed = pmu_enable_needed,
> + }, {
> + .vmsd = &vmstate_msr_hyperv,
> + .needed = hyperv_enable_needed,
> } , {
> /* empty */
> }
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] [PATCH 3/3] add support for hyperv time parameter
2014-01-21 8:02 ` [Qemu-devel] [PATCH 3/3] add support for hyperv time parameter Vadim Rozenfeld
@ 2014-01-21 10:21 ` Paolo Bonzini
2014-01-21 21:12 ` Vadim Rozenfeld
0 siblings, 1 reply; 9+ messages in thread
From: Paolo Bonzini @ 2014-01-21 10:21 UTC (permalink / raw)
To: Vadim Rozenfeld; +Cc: mtosatti, pl, qemu-devel, aliguori, Vadim Rozenfeld
Il 21/01/2014 09:02, Vadim Rozenfeld ha scritto:
> From: Vadim Rozenfeld <vrozenfeld@gamil.com>
>
> Signed-off-by: Vadim Rozenfeld <vrozenfe@redhat.com>
> ---
> linux-headers/asm-x86/hyperv.h | 3 +++
> linux-headers/linux/kvm.h | 1 +
> target-i386/cpu-qom.h | 1 +
> target-i386/cpu.c | 1 +
> target-i386/cpu.h | 1 +
> target-i386/kvm.c | 19 +++++++++++++++++++
> target-i386/machine.c | 1 +
> 7 files changed, 27 insertions(+)
>
> diff --git a/linux-headers/asm-x86/hyperv.h b/linux-headers/asm-x86/hyperv.h
> index b8f1c01..3b400ee 100644
> --- a/linux-headers/asm-x86/hyperv.h
> +++ b/linux-headers/asm-x86/hyperv.h
> @@ -149,6 +149,9 @@
> /* MSR used to read the per-partition time reference counter */
> #define HV_X64_MSR_TIME_REF_COUNT 0x40000020
>
> +/* A partition's reference time stamp counter (TSC) page */
> +#define HV_X64_MSR_REFERENCE_TSC 0x40000021
> +
> /* MSR used to retrieve the TSC frequency */
> #define HV_X64_MSR_TSC_FREQUENCY 0x40000022
>
> diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
> index 5a49671..999fb13 100644
> --- a/linux-headers/linux/kvm.h
> +++ b/linux-headers/linux/kvm.h
> @@ -674,6 +674,7 @@ struct kvm_ppc_smmu_info {
> #define KVM_CAP_ARM_EL1_32BIT 93
> #define KVM_CAP_SPAPR_MULTITCE 94
> #define KVM_CAP_EXT_EMUL_CPUID 95
> +#define KVM_CAP_HYPERV_TIME 96
>
> #ifdef KVM_CAP_IRQ_ROUTING
>
> diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h
> index d1751a4..722f11a 100644
> --- a/target-i386/cpu-qom.h
> +++ b/target-i386/cpu-qom.h
> @@ -69,6 +69,7 @@ typedef struct X86CPU {
> bool hyperv_vapic;
> bool hyperv_relaxed_timing;
> int hyperv_spinlock_attempts;
> + bool hyperv_time;
> bool check_cpuid;
> bool enforce_cpuid;
>
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index 0eea8c7..ff3290c 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -2744,6 +2744,7 @@ static Property x86_cpu_properties[] = {
> { .name = "hv-spinlocks", .info = &qdev_prop_spinlocks },
> DEFINE_PROP_BOOL("hv-relaxed", X86CPU, hyperv_relaxed_timing, false),
> DEFINE_PROP_BOOL("hv-vapic", X86CPU, hyperv_vapic, false),
> + DEFINE_PROP_BOOL("hv-time", X86CPU, hyperv_time, false),
> DEFINE_PROP_BOOL("check", X86CPU, check_cpuid, false),
> DEFINE_PROP_BOOL("enforce", X86CPU, enforce_cpuid, false),
> DEFINE_PROP_END_OF_LIST()
> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> index 6eeafdc..f7d7689 100644
> --- a/target-i386/cpu.h
> +++ b/target-i386/cpu.h
> @@ -850,6 +850,7 @@ typedef struct CPUX86State {
> uint64_t msr_hv_hypercall;
> uint64_t msr_hv_guest_os_id;
> uint64_t msr_hv_vapic;
> + uint64_t msr_hv_tsc;
>
> /* exception/interrupt handling */
> int error_code;
> diff --git a/target-i386/kvm.c b/target-i386/kvm.c
> index 5152e64..75ebc5d 100644
> --- a/target-i386/kvm.c
> +++ b/target-i386/kvm.c
> @@ -73,6 +73,7 @@ static bool has_msr_kvm_steal_time;
> static int lm_capable_kernel;
> static bool has_msr_hv_hypercall;
> static bool has_msr_hv_vapic;
> +static bool has_msr_hv_tsc;
>
> static bool has_msr_architectural_pmu;
> static uint32_t num_architectural_pmu_counters;
> @@ -433,6 +434,7 @@ unsigned long kvm_arch_vcpu_id(CPUState *cs)
> static bool hyperv_hypercall_available(X86CPU *cpu)
> {
> return cpu->hyperv_vapic ||
> + cpu->hyperv_time ||
> (cpu->hyperv_spinlock_attempts != HYPERV_SPINLOCK_NEVER_RETRY);
> }
>
> @@ -492,6 +494,13 @@ int kvm_arch_init_vcpu(CPUState *cs)
> c->eax |= HV_X64_MSR_APIC_ACCESS_AVAILABLE;
> has_msr_hv_vapic = true;
> }
> + if (cpu->hyperv_time &&
> + kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV_TIME) > 0) {
> + c->eax |= HV_X64_MSR_HYPERCALL_AVAILABLE;
> + c->eax |= HV_X64_MSR_TIME_REF_COUNT_AVAILABLE;
> + c->eax |= 0x200;
> + has_msr_hv_tsc = true;
> + }
>
> c = &cpuid_data.entries[cpuid_i++];
> c->function = HYPERV_CPUID_ENLIGHTMENT_INFO;
> @@ -1195,6 +1204,10 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
> kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_APIC_ASSIST_PAGE,
> env->msr_hv_vapic);
> }
> + if (has_msr_hv_tsc) {
> + kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_REFERENCE_TSC,
> + env->msr_hv_tsc);
> + }
> if (has_msr_feature_control) {
> kvm_msr_entry_set(&msrs[n++], MSR_IA32_FEATURE_CONTROL,
> env->msr_ia32_feature_control);
> @@ -1480,6 +1493,9 @@ static int kvm_get_msrs(X86CPU *cpu)
> if (has_msr_hv_vapic) {
> msrs[n++].index = HV_X64_MSR_APIC_ASSIST_PAGE;
> }
> + if (has_msr_hv_tsc) {
> + msrs[n++].index = HV_X64_MSR_REFERENCE_TSC;
> + }
>
> msr_data.info.nmsrs = n;
> ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MSRS, &msr_data);
> @@ -1594,6 +1610,9 @@ static int kvm_get_msrs(X86CPU *cpu)
> case HV_X64_MSR_APIC_ASSIST_PAGE:
> env->msr_hv_vapic = msrs[i].data;
> break;
> + case HV_X64_MSR_REFERENCE_TSC:
> + env->msr_hv_tsc = msrs[i].data;
> + break;
> }
> }
>
> diff --git a/target-i386/machine.c b/target-i386/machine.c
> index 58c5b45..9e9a001 100644
> --- a/target-i386/machine.c
> +++ b/target-i386/machine.c
> @@ -523,6 +523,7 @@ static const VMStateDescription vmstate_msr_hyperv = {
> VMSTATE_UINT64(env.msr_hv_hypercall, X86CPU),
> VMSTATE_UINT64(env.msr_hv_guest_os_id, X86CPU),
> VMSTATE_UINT64(env.msr_hv_vapic, X86CPU),
> + VMSTATE_UINT64(env.msr_hv_tsc, X86CPU),
> VMSTATE_END_OF_LIST()
> }
> };
>
If you are planning some level of backwards compatibility with RHEL6, it
may make sense to use separate subsections.
Paolo
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] [PATCH 3/3] add support for hyperv time parameter
2014-01-21 10:21 ` Paolo Bonzini
@ 2014-01-21 21:12 ` Vadim Rozenfeld
2014-01-22 10:02 ` Paolo Bonzini
0 siblings, 1 reply; 9+ messages in thread
From: Vadim Rozenfeld @ 2014-01-21 21:12 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: mtosatti, pl, qemu-devel, aliguori
On Tue, 2014-01-21 at 11:21 +0100, Paolo Bonzini wrote:
> Il 21/01/2014 09:02, Vadim Rozenfeld ha scritto:
> > From: Vadim Rozenfeld <vrozenfeld@gamil.com>
> >
> > Signed-off-by: Vadim Rozenfeld <vrozenfe@redhat.com>
> > ---
> > linux-headers/asm-x86/hyperv.h | 3 +++
> > linux-headers/linux/kvm.h | 1 +
> > target-i386/cpu-qom.h | 1 +
> > target-i386/cpu.c | 1 +
> > target-i386/cpu.h | 1 +
> > target-i386/kvm.c | 19 +++++++++++++++++++
> > target-i386/machine.c | 1 +
> > 7 files changed, 27 insertions(+)
> >
> > diff --git a/linux-headers/asm-x86/hyperv.h b/linux-headers/asm-x86/hyperv.h
> > index b8f1c01..3b400ee 100644
> > --- a/linux-headers/asm-x86/hyperv.h
> > +++ b/linux-headers/asm-x86/hyperv.h
> > @@ -149,6 +149,9 @@
> > /* MSR used to read the per-partition time reference counter */
> > #define HV_X64_MSR_TIME_REF_COUNT 0x40000020
> >
> > +/* A partition's reference time stamp counter (TSC) page */
> > +#define HV_X64_MSR_REFERENCE_TSC 0x40000021
> > +
> > /* MSR used to retrieve the TSC frequency */
> > #define HV_X64_MSR_TSC_FREQUENCY 0x40000022
> >
> > diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
> > index 5a49671..999fb13 100644
> > --- a/linux-headers/linux/kvm.h
> > +++ b/linux-headers/linux/kvm.h
> > @@ -674,6 +674,7 @@ struct kvm_ppc_smmu_info {
> > #define KVM_CAP_ARM_EL1_32BIT 93
> > #define KVM_CAP_SPAPR_MULTITCE 94
> > #define KVM_CAP_EXT_EMUL_CPUID 95
> > +#define KVM_CAP_HYPERV_TIME 96
> >
> > #ifdef KVM_CAP_IRQ_ROUTING
> >
> > diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h
> > index d1751a4..722f11a 100644
> > --- a/target-i386/cpu-qom.h
> > +++ b/target-i386/cpu-qom.h
> > @@ -69,6 +69,7 @@ typedef struct X86CPU {
> > bool hyperv_vapic;
> > bool hyperv_relaxed_timing;
> > int hyperv_spinlock_attempts;
> > + bool hyperv_time;
> > bool check_cpuid;
> > bool enforce_cpuid;
> >
> > diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> > index 0eea8c7..ff3290c 100644
> > --- a/target-i386/cpu.c
> > +++ b/target-i386/cpu.c
> > @@ -2744,6 +2744,7 @@ static Property x86_cpu_properties[] = {
> > { .name = "hv-spinlocks", .info = &qdev_prop_spinlocks },
> > DEFINE_PROP_BOOL("hv-relaxed", X86CPU, hyperv_relaxed_timing, false),
> > DEFINE_PROP_BOOL("hv-vapic", X86CPU, hyperv_vapic, false),
> > + DEFINE_PROP_BOOL("hv-time", X86CPU, hyperv_time, false),
> > DEFINE_PROP_BOOL("check", X86CPU, check_cpuid, false),
> > DEFINE_PROP_BOOL("enforce", X86CPU, enforce_cpuid, false),
> > DEFINE_PROP_END_OF_LIST()
> > diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> > index 6eeafdc..f7d7689 100644
> > --- a/target-i386/cpu.h
> > +++ b/target-i386/cpu.h
> > @@ -850,6 +850,7 @@ typedef struct CPUX86State {
> > uint64_t msr_hv_hypercall;
> > uint64_t msr_hv_guest_os_id;
> > uint64_t msr_hv_vapic;
> > + uint64_t msr_hv_tsc;
> >
> > /* exception/interrupt handling */
> > int error_code;
> > diff --git a/target-i386/kvm.c b/target-i386/kvm.c
> > index 5152e64..75ebc5d 100644
> > --- a/target-i386/kvm.c
> > +++ b/target-i386/kvm.c
> > @@ -73,6 +73,7 @@ static bool has_msr_kvm_steal_time;
> > static int lm_capable_kernel;
> > static bool has_msr_hv_hypercall;
> > static bool has_msr_hv_vapic;
> > +static bool has_msr_hv_tsc;
> >
> > static bool has_msr_architectural_pmu;
> > static uint32_t num_architectural_pmu_counters;
> > @@ -433,6 +434,7 @@ unsigned long kvm_arch_vcpu_id(CPUState *cs)
> > static bool hyperv_hypercall_available(X86CPU *cpu)
> > {
> > return cpu->hyperv_vapic ||
> > + cpu->hyperv_time ||
> > (cpu->hyperv_spinlock_attempts != HYPERV_SPINLOCK_NEVER_RETRY);
> > }
> >
> > @@ -492,6 +494,13 @@ int kvm_arch_init_vcpu(CPUState *cs)
> > c->eax |= HV_X64_MSR_APIC_ACCESS_AVAILABLE;
> > has_msr_hv_vapic = true;
> > }
> > + if (cpu->hyperv_time &&
> > + kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV_TIME) > 0) {
> > + c->eax |= HV_X64_MSR_HYPERCALL_AVAILABLE;
> > + c->eax |= HV_X64_MSR_TIME_REF_COUNT_AVAILABLE;
> > + c->eax |= 0x200;
> > + has_msr_hv_tsc = true;
> > + }
> >
> > c = &cpuid_data.entries[cpuid_i++];
> > c->function = HYPERV_CPUID_ENLIGHTMENT_INFO;
> > @@ -1195,6 +1204,10 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
> > kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_APIC_ASSIST_PAGE,
> > env->msr_hv_vapic);
> > }
> > + if (has_msr_hv_tsc) {
> > + kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_REFERENCE_TSC,
> > + env->msr_hv_tsc);
> > + }
> > if (has_msr_feature_control) {
> > kvm_msr_entry_set(&msrs[n++], MSR_IA32_FEATURE_CONTROL,
> > env->msr_ia32_feature_control);
> > @@ -1480,6 +1493,9 @@ static int kvm_get_msrs(X86CPU *cpu)
> > if (has_msr_hv_vapic) {
> > msrs[n++].index = HV_X64_MSR_APIC_ASSIST_PAGE;
> > }
> > + if (has_msr_hv_tsc) {
> > + msrs[n++].index = HV_X64_MSR_REFERENCE_TSC;
> > + }
> >
> > msr_data.info.nmsrs = n;
> > ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MSRS, &msr_data);
> > @@ -1594,6 +1610,9 @@ static int kvm_get_msrs(X86CPU *cpu)
> > case HV_X64_MSR_APIC_ASSIST_PAGE:
> > env->msr_hv_vapic = msrs[i].data;
> > break;
> > + case HV_X64_MSR_REFERENCE_TSC:
> > + env->msr_hv_tsc = msrs[i].data;
> > + break;
> > }
> > }
> >
> > diff --git a/target-i386/machine.c b/target-i386/machine.c
> > index 58c5b45..9e9a001 100644
> > --- a/target-i386/machine.c
> > +++ b/target-i386/machine.c
> > @@ -523,6 +523,7 @@ static const VMStateDescription vmstate_msr_hyperv = {
> > VMSTATE_UINT64(env.msr_hv_hypercall, X86CPU),
> > VMSTATE_UINT64(env.msr_hv_guest_os_id, X86CPU),
> > VMSTATE_UINT64(env.msr_hv_vapic, X86CPU),
> > + VMSTATE_UINT64(env.msr_hv_tsc, X86CPU),
> > VMSTATE_END_OF_LIST()
> > }
> > };
> >
>
> If you are planning some level of backwards compatibility with RHEL6, it
> may make sense to use separate subsections.
I believe we have to make it backward compatible. In RHEL6 we added
support for relaxed timers only, but upstream doesn't have such bits.
Technically, hypercall page, vapic and iTSC pages will be introduced in
RHEL7 and as you said, they will probably go to a different, new
section, but for upstream the entire section is absolutely new.
Vadim.
>
> Paolo
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] [PATCH 3/3] add support for hyperv time parameter
2014-01-21 21:12 ` Vadim Rozenfeld
@ 2014-01-22 10:02 ` Paolo Bonzini
0 siblings, 0 replies; 9+ messages in thread
From: Paolo Bonzini @ 2014-01-22 10:02 UTC (permalink / raw)
To: Vadim Rozenfeld; +Cc: mtosatti, pl, qemu-devel, aliguori
Il 21/01/2014 22:12, Vadim Rozenfeld ha scritto:
>> >
>> > If you are planning some level of backwards compatibility with RHEL6, it
>> > may make sense to use separate subsections.
> I believe we have to make it backward compatible. In RHEL6 we added
> support for relaxed timers only, but upstream doesn't have such bits.
> Technically, hypercall page, vapic and iTSC pages will be introduced in
> RHEL7 and as you said, they will probably go to a different, new
> section, but for upstream the entire section is absolutely new.
Ok, then upstream we have choice. Using 2 subsections is not wrong, and
it makes sense since it's covered by different kernel capabilities.
Paolo
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2014-01-22 10:02 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-01-21 8:02 [Qemu-devel] [PATCH 0/3] Hyper-V parameters Vadim Rozenfeld
2014-01-21 8:02 ` [Qemu-devel] [PATCH 1/3] cleanup hyper-v interface initialization Vadim Rozenfeld
2014-01-21 10:14 ` Paolo Bonzini
2014-01-21 8:02 ` [Qemu-devel] [PATCH 2/3] make hyperv hypercall, vapic, and os id MSRs migratable Vadim Rozenfeld
2014-01-21 10:17 ` Paolo Bonzini
2014-01-21 8:02 ` [Qemu-devel] [PATCH 3/3] add support for hyperv time parameter Vadim Rozenfeld
2014-01-21 10:21 ` Paolo Bonzini
2014-01-21 21:12 ` Vadim Rozenfeld
2014-01-22 10:02 ` Paolo Bonzini
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