From: Richard Henderson <rth@twiddle.net>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: patches@linaro.org, "Michael Matz" <matz@suse.de>,
"Alexander Graf" <agraf@suse.de>,
"Claudio Fontana" <claudio.fontana@linaro.org>,
"Dirk Mueller" <dmueller@suse.de>,
"Will Newton" <will.newton@linaro.org>,
"Laurent Desnogues" <laurent.desnogues@gmail.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
kvmarm@lists.cs.columbia.edu,
"Christoffer Dall" <christoffer.dall@linaro.org>
Subject: Re: [Qemu-devel] [PATCH v2 1/8] target-arm: A64: Add SIMD three-different multiply accumulate insns
Date: Thu, 23 Jan 2014 08:42:14 -0800 [thread overview]
Message-ID: <52E14666.2040204@twiddle.net> (raw)
In-Reply-To: <1390490939-17011-2-git-send-email-peter.maydell@linaro.org>
On 01/23/2014 07:28 AM, Peter Maydell wrote:
> Add support for the multiply-accumulate instructions from the
> SIMD three-different instructions group (C3.6.15):
> * skeleton decode of unallocated encodings and split of
> the group into its three sub-parts
> * framework for handling the 64x64->128 widening subpart
> * implementation of the multiply-accumulate instructions
> SMLAL, SMLAL2, UMLAL, UMLAL2, SMLSL, SMLSL2, UMLSL, UMLSL2,
> UMULL, UMULL2, SMULL, SMULL2
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> target-arm/translate-a64.c | 233 ++++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 232 insertions(+), 1 deletion(-)
Reviewed-by: Richard Henderson <rth@twiddle.net>
r~
next prev parent reply other threads:[~2014-01-23 16:42 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-23 15:28 [Qemu-devel] [PATCH v2 0/8] target-arm: A64 Neon instructions, set 2 Peter Maydell
2014-01-23 15:28 ` [Qemu-devel] [PATCH v2 1/8] target-arm: A64: Add SIMD three-different multiply accumulate insns Peter Maydell
2014-01-23 16:42 ` Richard Henderson [this message]
2014-01-23 15:28 ` [Qemu-devel] [PATCH v2 2/8] target-arm: A64: Add SIMD three-different ABDL instructions Peter Maydell
2014-01-23 15:28 ` [Qemu-devel] [PATCH v2 3/8] target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops Peter Maydell
2014-01-23 15:28 ` [Qemu-devel] [PATCH v2 4/8] target-arm: A64: Add top level decode for SIMD 3-same group Peter Maydell
2014-01-23 15:28 ` [Qemu-devel] [PATCH v2 5/8] target-arm: A64: Add logic ops from SIMD 3 same group Peter Maydell
2014-01-23 15:28 ` [Qemu-devel] [PATCH v2 6/8] target-arm: A64: Add integer ops from SIMD 3-same group Peter Maydell
2014-01-23 16:53 ` Richard Henderson
2014-01-25 18:35 ` Peter Maydell
2014-01-23 15:28 ` [Qemu-devel] [PATCH v2 7/8] target-arm: A64: Add simple SIMD 3-same floating point ops Peter Maydell
2014-01-23 16:55 ` Richard Henderson
2014-01-23 17:26 ` Peter Maydell
2014-01-23 15:28 ` [Qemu-devel] [PATCH v2 8/8] target-arm: A64: Add SIMD shift by immediate Peter Maydell
2014-01-23 20:08 ` C Fontana
2014-01-23 20:11 ` Peter Maydell
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