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Date: Thu, 23 Jan 2014 08:42:14 -0800
From: Richard Henderson <rth@twiddle.net>
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Subject: Re: [Qemu-devel] [PATCH v2 1/8] target-arm: A64: Add SIMD
 three-different multiply accumulate insns
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To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: patches@linaro.org, Michael Matz <matz@suse.de>, Alexander Graf <agraf@suse.de>, Claudio Fontana <claudio.fontana@linaro.org>, Dirk Mueller <dmueller@suse.de>, Will Newton <will.newton@linaro.org>, Laurent Desnogues <laurent.desnogues@gmail.com>, =?ISO-8859-1?Q?Alex_Benn=E9e?= <alex.bennee@linaro.org>, kvmarm@lists.cs.columbia.edu, Christoffer Dall <christoffer.dall@linaro.org>

On 01/23/2014 07:28 AM, Peter Maydell wrote:
> Add support for the multiply-accumulate instructions from the
> SIMD three-different instructions group (C3.6.15):
>  * skeleton decode of unallocated encodings and split of
>    the group into its three sub-parts
>  * framework for handling the 64x64->128 widening subpart
>  * implementation of the multiply-accumulate instructions
>    SMLAL, SMLAL2, UMLAL, UMLAL2, SMLSL, SMLSL2, UMLSL, UMLSL2,
>    UMULL, UMULL2, SMULL, SMULL2
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  target-arm/translate-a64.c | 233 ++++++++++++++++++++++++++++++++++++++++++++-
>  1 file changed, 232 insertions(+), 1 deletion(-)

Reviewed-by: Richard Henderson <rth@twiddle.net>


r~