From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36433) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WDuir-0003jx-Fa for qemu-devel@nongnu.org; Thu, 13 Feb 2014 06:44:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WDuio-0003lp-7q for qemu-devel@nongnu.org; Thu, 13 Feb 2014 06:44:53 -0500 Message-ID: <52FCB038.3090500@adacore.com> Date: Thu, 13 Feb 2014 12:44:56 +0100 From: Fabien Chouteau MIME-Version: 1.0 References: <1392282978-19368-1-git-send-email-sebastian.huber@embedded-brains.de> In-Reply-To: <1392282978-19368-1-git-send-email-sebastian.huber@embedded-brains.de> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] hw/timer/grlib_gptimer: Avoid integer overflow List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Sebastian Huber , qemu-devel@nongnu.org Cc: qemu-trivial@nongnu.org On 02/13/2014 10:16 AM, Sebastian Huber wrote: > The GPTIMER uses 32-bit registers. Use a 64-bit operation to get the > ptimer count, otherwise we end up with a count of 0 for GPTIMER counter > values of 0xffffffff. Looks good, thanks Sebastian. Reviewed-by: Fabien Chouteau > --- > hw/timer/grlib_gptimer.c | 4 ++-- > 1 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c > index d5687f6..343563c 100644 > --- a/hw/timer/grlib_gptimer.c > +++ b/hw/timer/grlib_gptimer.c > @@ -106,9 +106,9 @@ static void grlib_gptimer_enable(GPTimer *timer) > /* ptimer is triggered when the counter reach 0 but GPTimer is triggered at > underflow. Set count + 1 to simulate the GPTimer behavior. */ > > - trace_grlib_gptimer_enable(timer->id, timer->counter + 1); > + trace_grlib_gptimer_enable(timer->id, timer->counter); > > - ptimer_set_count(timer->ptimer, timer->counter + 1); > + ptimer_set_count(timer->ptimer, (uint64_t)timer->counter + 1); > ptimer_run(timer->ptimer, 1); > } > >