From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39086) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WDuym-0006T2-UU for qemu-devel@nongnu.org; Thu, 13 Feb 2014 07:01:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WDuyd-0000M3-Ph for qemu-devel@nongnu.org; Thu, 13 Feb 2014 07:01:20 -0500 Received: from mel.act-europe.fr ([194.98.77.210]:39546 helo=smtp.eu.adacore.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WDuyd-0000Lx-Jh for qemu-devel@nongnu.org; Thu, 13 Feb 2014 07:01:11 -0500 Message-ID: <52FCB414.2050306@adacore.com> Date: Thu, 13 Feb 2014 13:01:24 +0100 From: Fabien Chouteau MIME-Version: 1.0 References: <1392285137-10598-1-git-send-email-sebastian.huber@embedded-brains.de> In-Reply-To: <1392285137-10598-1-git-send-email-sebastian.huber@embedded-brains.de> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2] SPARC: Add and use CPU_FEATURE_CASA List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Sebastian Huber , qemu-devel@nongnu.org Cc: blauwirbel@gmail.com On 02/13/2014 10:52 AM, Sebastian Huber wrote: > The LEON3 processor has support for the CASA instruction which is > normally only available for SPARC V9 processors. Binutils 2.24 > and GCC 4.9 will support this instruction for LEON3. GCC uses it to > generate C11 atomic operations. > > The CAS synthetic instruction uses an ASI of 0x80. If TARGET_SPARC64 is > not defined use a supervisor data load/store for an ASI of 0x80 in > helper_ld_asi()/helper_st_asi(). > Hello Sebastian, If I understand correctly, the difference with V1 is that ASI 0x80. Why did you chose Supervisor data access against User data access? (I cannot find documentation about 0x80 ASI) Thanks,