From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43669) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WEELI-0007cB-Sz for qemu-devel@nongnu.org; Fri, 14 Feb 2014 03:41:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WEELD-0000Bj-UI for qemu-devel@nongnu.org; Fri, 14 Feb 2014 03:41:52 -0500 Received: from host-82-135-62-35.customer.m-online.net ([82.135.62.35]:49374 helo=mail.embedded-brains.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WEELD-0000AH-LC for qemu-devel@nongnu.org; Fri, 14 Feb 2014 03:41:47 -0500 Message-ID: <52FDD6C1.6050108@embedded-brains.de> Date: Fri, 14 Feb 2014 09:41:37 +0100 From: Sebastian Huber MIME-Version: 1.0 References: <1392285137-10598-1-git-send-email-sebastian.huber@embedded-brains.de> <52FCB414.2050306@adacore.com> <52FCC1F3.9020205@embedded-brains.de> <52FCDCD7.3070903@adacore.com> <52FCE9BC.7040703@adacore.com> In-Reply-To: <52FCE9BC.7040703@adacore.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v2] SPARC: Add and use CPU_FEATURE_CASA List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Fabien Chouteau Cc: blauwirbel@gmail.com, qemu-devel@nongnu.org On 2014-02-13 16:50, Fabien Chouteau wrote: > On 02/13/2014 03:55 PM, Fabien Chouteau wrote: >> On 02/13/2014 02:00 PM, Sebastian Huber wrote: >>> On 2014-02-13 13:01, Fabien Chouteau wrote: >>>> On 02/13/2014 10:52 AM, Sebastian Huber wrote: >>>>> The LEON3 processor has support for the CASA instruction which is >>>>> normally only available for SPARC V9 processors. Binutils 2.24 >>>>> and GCC 4.9 will support this instruction for LEON3. GCC uses it t= o >>>>> generate C11 atomic operations. >>>>> >>>>> The CAS synthetic instruction uses an ASI of 0x80. If TARGET_SPARC= 64 is >>>>> not defined use a supervisor data load/store for an ASI of 0x80 in >>>>> helper_ld_asi()/helper_st_asi(). >>>>> >>>> >>>> Hello Sebastian, >>>> >>>> If I understand correctly, the difference with V1 is that ASI 0x80. = Why >>>> did you chose Supervisor data access against User data access? >>> >>> User data access would work also. I don't have a preference here. >>> >>>> (I cannot >>>> find documentation about 0x80 ASI) >>> >>> GCC will generate CAS instructions, e.g. >> >> ... >> >>> In the GNU Binutils you find: >>> >>> opcodes/sparc-opc.c:{ "cas", F3(3, 0x3c, 0)|ASI(0x80), F3(~3, ~0x3= c, ~0)|ASI(~0x80), "[1],2,d", F_ALIAS, 0, v9andleon }, /* casa [rs1]ASI_P= ,rs2,rd */ >>> >>> This is where the 0x80 comes from. >>> >> >> In some leon3 doc I found this: >> >> 62.2.7 Compare and Swap instruction (CASA) >> LEON3 implements the SPARC V9 Compare and Swap Alternative (CASA) inst= ruction. The CASA >> is enabled the interger load delay is set to 1 and the NOTAG generic i= s 0. The CASA operates as >> described in the SPARC V9 manual. The instruction is privileged but se= tting ASI =3D 0xA (user data) >> will allow it to be used in user mode. >> >> Which confirm privileged instruction. I will ask our GCC expert if the= y >> know where that 0x80 ASI comes from. >> > > This ASI 0x80 is really defined nowhere in Leon3 not even in the source= s :) > Maybe there's a bug in binutils... Did you try to run this program on a= real board? Yes, I tested it on a NGMP board with a LEON4 processor (documentation is= the=20 same for CAS as in LEON3). The ASI 0x80 is defined in the SPARC V9 manual, Table 12=97Address Space=20 Identifiers (ASIs). Here we have: 0x80, ASI_PRIMARY, Unrestricted access, Primary address space So should I change it to use User Data Access? --=20 Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.huber@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine gesch=E4ftliche Mitteilung im Sinne des EHUG.