From: Alexander Graf <agraf@suse.de>
To: Laszlo Ersek <lersek@redhat.com>, qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, mst@redhat.com,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Shannon Zhao <shannon.zhao@linaro.org>
Subject: Re: [Qemu-devel] [PATCH] target-arm: Declare virtio-mmio as dma-coherent in dt
Date: Thu, 9 Feb 2017 13:29:36 +0100 [thread overview]
Message-ID: <52f06298-6ddb-2ff7-a213-d5738bdcfbc5@suse.de> (raw)
In-Reply-To: <c1ff3829-b068-881a-1523-317ef0d31689@redhat.com>
On 08/02/2017 17:17, Laszlo Ersek wrote:
> On 02/08/17 17:12, Alexander Graf wrote:
>> On 02/08/2017 04:29 PM, Laszlo Ersek wrote:
>>> CC'ing Ard and Shannon (I recall this property from earlier):
>>>
>>> On 02/08/17 14:31, Alexander Graf wrote:
>>>> QEMU emulated hardware is always dma coherent with its guest. We do
>>>> annotate that correctly on the PCI host controller, but left out
>>>> virtio-mmio.
>>> I recommend to reference the following commit here:
>>>
>>> commit 5d636e21c44ecf982a22a7bc4ca89186079ac283
>>> Author: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>>> Date: Mon Jul 4 13:06:36 2016 +0100
>>>
>>> hw/arm/virt: mark the PCIe host controller as DMA coherent in the DT
>>> Since QEMU performs cacheable accesses to guest memory when
>>> doing DMA
>>> as part of the implementation of emulated PCI devices, guest drivers
>>> should use cacheable accesses as well when running under KVM.
>>> Since this
>>> essentially means that emulated PCI devices are DMA coherent, set
>>> the
>>> 'dma-coherent' DT property on the PCIe host controller DT node.
>>> This brings the DT description into line with the ACPI
>>> description,
>>> which already marks the PCI bridge as cache coherent (see commit
>>> bc64b96c984abf).
>>> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>>> Message-id:
>>> 1467134090-5099-1-git-send-email-ard.biesheuvel@linaro.org
>>> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
>>> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
>>>
>>>> Recent kernels have started to interpret that flag rather than take
>>>> dma coherency as granted with virtio-mmio. While that is considered
>>>> a kernel bug, as it breaks previously working systems, it showed that
>>>> our dt description is incomplete.
>>>>
>>>> This patch adds the respective marker that allows guest OSs to evaluate
>>>> that our virtio-mmio devices are indeed cache coherent.
>>> As noted above, commit bc64b96c984a ("hw/arm/virt-acpi-build: _CCA
>>> attribute is compulsory", 2015-11-03) had done the same in the ACPI
>>> description of the PCIe host controller.
>>>
>>> Thus, do we need _CCA in the ACPI description of the virtio-mmio
>>> transports, to parallel the DT change? See the LNRO0005 device in
>>> acpi_dsdt_add_virtio().
>>
>> Yes, we should also annotate it correctly in the DSDT. Today it's not a
>> deal breaker as Linux always assumes virtio-mmio to be dma coherent, but
>> it would make our platform description more accurate.
>>
>>> If that's the case, then I propose that either the patch please fix
>>> both DT and ACPI, or that at least we file a bug "somewhere", for
>>> adding _CCA in acpi_dsdt_add_virtio().
>>
>> I agree that it should happen in the same patch (set). While I don't
>> care a lot about ACPI right now (since dt is preferred on upstream
>> kernels), I can take a look.
>
> Thank you!
In fact, don't some other devices also suffer from this? Fw-cfg is now
DMA capable IIUC, so that should also get a _CCA attribute for example.
Alex
next prev parent reply other threads:[~2017-02-09 12:29 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-08 13:31 [Qemu-devel] [PATCH] target-arm: Declare virtio-mmio as dma-coherent in dt Alexander Graf
2017-02-08 15:29 ` Laszlo Ersek
2017-02-08 16:12 ` Alexander Graf
2017-02-08 16:17 ` Laszlo Ersek
2017-02-08 16:27 ` Ard Biesheuvel
2017-02-08 18:23 ` [Qemu-devel] [Qemu-arm] " Peter Maydell
2017-02-08 18:47 ` Laszlo Ersek
2017-02-09 12:04 ` Heyi Guo
2017-02-10 1:40 ` Alex Hung
2017-02-09 10:35 ` Ard Biesheuvel
2017-02-09 12:24 ` [Qemu-devel] " Alexander Graf
2017-02-09 12:30 ` Ard Biesheuvel
2017-02-09 12:43 ` Alexander Graf
2017-02-09 12:41 ` Andrew Jones
2017-02-09 12:29 ` Alexander Graf [this message]
2017-02-09 12:31 ` Ard Biesheuvel
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