From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45790) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WFAsk-0004o1-Ca for qemu-devel@nongnu.org; Sun, 16 Feb 2014 18:12:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WFAsf-0004UU-4E for qemu-devel@nongnu.org; Sun, 16 Feb 2014 18:12:18 -0500 Received: from mout.gmx.net ([212.227.15.18]:50241) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WFAse-0004UQ-RR for qemu-devel@nongnu.org; Sun, 16 Feb 2014 18:12:13 -0500 Received: from [192.168.1.24] ([90.38.117.132]) by mail.gmx.com (mrgmx102) with ESMTPSA (Nemesis) id 0MZwYd-1WaHhN2a3L-00LpC4 for ; Mon, 17 Feb 2014 00:12:11 +0100 Message-ID: <53014626.20009@caramail.com> Date: Mon, 17 Feb 2014 00:13:42 +0100 From: Olivier Danet MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH] Sun4m : SCSI ESP controller List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel , Blue Swirl , Mark Cave-Ayland , Artyom Tarasenko Two small fixes for the ESP (AM53C94) SCSI controller * Signal the end of the DMA transfer after a SCSI command. * The status register (RSTAT) is cleared after reading the interrupt status register (RINTR), except for the TC bit (=Count To Zero) and the scsi phase bits, which mirror SCSI signals levels. Fixes the bug "esp0: !TC on DATA XFER" with NetBSD https://bugs.launchpad.net/qemu/+bug/1055090 Signed-off-by: Olivier Danet --- hw/scsi/esp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index 2d150bf..5e91077 100644 --- a/hw/scsi/esp.c +++ b/hw/scsi/esp.c @@ -246,6 +246,7 @@ static void esp_do_dma(ESPState *s) s->cmdlen = 0; s->do_cmd = 0; do_cmd(s, s->cmdbuf); + esp_dma_done(s); return; } if (s->async_len == 0) { @@ -417,10 +418,9 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr) except TC */ old_val = s->rregs[ESP_RINTR]; s->rregs[ESP_RINTR] = 0; - s->rregs[ESP_RSTAT] &= ~STAT_TC; s->rregs[ESP_RSEQ] = SEQ_CD; esp_lower_irq(s); - + s->rregs[ESP_RSTAT] &= STAT_TC | STAT_MI; return old_val; default: break; -- 1.8.1.5