From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46055) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WFQtw-0002Nn-WC for qemu-devel@nongnu.org; Mon, 17 Feb 2014 11:18:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WFQtp-0004rP-I0 for qemu-devel@nongnu.org; Mon, 17 Feb 2014 11:18:36 -0500 Received: from mail.mc.net ([209.172.128.24]:42530) by eggs.gnu.org with smtp (Exim 4.71) (envelope-from ) id 1WFQtp-0004r8-D4 for qemu-devel@nongnu.org; Mon, 17 Feb 2014 11:18:29 -0500 Message-ID: <53023654.7070009@mc.net> Date: Mon, 17 Feb 2014 10:18:28 -0600 From: Bob Breuer MIME-Version: 1.0 References: <1391877522-17254-1-git-send-email-mark.cave-ayland@ilande.co.uk> <1391877522-17254-2-git-send-email-mark.cave-ayland@ilande.co.uk> <52F7840F.4090608@ilande.co.uk> <53020584.9050004@ilande.co.uk> In-Reply-To: <53020584.9050004@ilande.co.uk> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCHv2 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Mark Cave-Ayland Cc: Peter Maydell , Peter Crosthwaite , "qemu-devel@nongnu.org Developers" , Blue Swirl , Anthony Liguori , Artyom Tarasenko On 2/17/2014 6:50 AM, Mark Cave-Ayland wrote: > On 14/02/14 14:54, Peter Crosthwaite wrote: > >>> The short answer is "we don't know" because we don't have any >>> documentation. >> >> Sigh.... This has happened quite a lot lately. >> >> If the kernel driver has macros, re-use them as much as possible. If >> you have a vague idea on whats, what, a few well invented names would >> help the device self-documentation. > > Okay. I now have a revised version which borrows macro names from the > Linux and BSD drivers which I think should be more readable. I'll post > the revised version to the list shortly. > >>>> Your hander switch statements stride in 4, are you only doing this for >>>> your one exception case of that one-byte big-endian access I commented >>>> earlier. >>> >>> >>> Yes, that is correct. >>> >> >> Should you trap misaligned accesses then? > > Over the weekend I found out that the non-BT458 accesses (addr >= 0x10) > are done as byte accesses and so byte accesses do need to be allowed to > these registers. My interpretation of reading the SBus documentation is > that on real hardware the bus converts accesses for you, and so I don't > think a trap would be suitable here. Also I've not found an image (yet) > that attempts bad accesses in this way across my OpenBIOS ISO test suite... When you create the memory region for the registers, try this: .endianness = DEVICE_BIG_ENDIAN, .impl = { .min_access_size = 1, .max_access_size = 1, }, and ignore the bottom 2 address bits for the DAC accesses. QEMU should then break any 32-bit accesses down to the correct 8-bit accesses. Bob