From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48726) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WKOKf-0000bI-TU for qemu-devel@nongnu.org; Mon, 03 Mar 2014 03:34:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WKOKb-0006Le-9q for qemu-devel@nongnu.org; Mon, 03 Mar 2014 03:34:41 -0500 Received: from mail-qa0-x22b.google.com ([2607:f8b0:400d:c00::22b]:41559) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WKOKb-0006LZ-11 for qemu-devel@nongnu.org; Mon, 03 Mar 2014 03:34:37 -0500 Received: by mail-qa0-f43.google.com with SMTP id j15so2563636qaq.16 for ; Mon, 03 Mar 2014 00:34:35 -0800 (PST) Sender: Paolo Bonzini Message-ID: <53143E91.4070900@redhat.com> Date: Mon, 03 Mar 2014 09:34:25 +0100 From: Paolo Bonzini MIME-Version: 1.0 References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] target-i386: bugfix of Intel MPX List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Liu, Jinsong" , "'qemu-devel@nongnu.org'" , "'kvm@vger.kernel.org'" , "'linux-kernel@vger.kernel.org'" Cc: "Mallick, Asit K" , "'gleb@redhat.com'" , "'hpa@zytor.com'" Il 03/03/2014 06:24, Liu, Jinsong ha scritto: > From 3a7783cd9a0556787809d3d5ecb5f2b85dd9fc02 Mon Sep 17 00:00:00 2001 > From: Liu Jinsong > Date: Mon, 3 Mar 2014 18:56:39 +0800 > Subject: [PATCH] target-i386: bugfix of Intel MPX > > The correct size of cpuid 0x0d sub-leaf 4 is 0x40, not 0x10. > This is confirmed by Anvin H Peter and Mallick Asit K. > > Signed-off-by: Liu Jinsong > Cc: H. Peter Anvin > Cc: Asit K Mallick > --- > target-i386/cpu.c | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/target-i386/cpu.c b/target-i386/cpu.c > index 0e8812a..9f69d7e 100644 > --- a/target-i386/cpu.c > +++ b/target-i386/cpu.c > @@ -339,7 +339,7 @@ static const ExtSaveArea ext_save_areas[] = { > [3] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX, > .offset = 0x3c0, .size = 0x40 }, > [4] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX, > - .offset = 0x400, .size = 0x10 }, > + .offset = 0x400, .size = 0x40 }, > }; > > const char *get_register_name_32(unsigned int reg) > Thanks, applying to uq/master. Paolo