From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36252) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WQNf0-00066m-9m for qemu-devel@nongnu.org; Wed, 19 Mar 2014 17:04:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WQNev-0004SB-8M for qemu-devel@nongnu.org; Wed, 19 Mar 2014 17:04:26 -0400 Received: from mail-qa0-x22a.google.com ([2607:f8b0:400d:c00::22a]:45900) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WQNev-0004S6-40 for qemu-devel@nongnu.org; Wed, 19 Mar 2014 17:04:21 -0400 Received: by mail-qa0-f42.google.com with SMTP id k15so9388531qaq.29 for ; Wed, 19 Mar 2014 14:04:20 -0700 (PDT) Sender: Richard Henderson Message-ID: <532A0650.3040109@twiddle.net> Date: Wed, 19 Mar 2014 14:04:16 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1394836210-15934-1-git-send-email-rth@twiddle.net> In-Reply-To: <1394836210-15934-1-git-send-email-rth@twiddle.net> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH] cpu: Move tcg_exit_req to the end of CPUState List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= Ping? This is a significant TCG code size regression for ARM, AArch64, and Sparc hosts. It helps x86 too, though that's not as severe. r~ On 03/14/2014 03:30 PM, Richard Henderson wrote: > Reverse an increase in the size of generated code. > > Cc: Andreas Färber > Signed-off-by: Richard Henderson > --- > include/qom/cpu.h | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/include/qom/cpu.h b/include/qom/cpu.h > index 06ee263..f99885a 100644 > --- a/include/qom/cpu.h > +++ b/include/qom/cpu.h > @@ -227,7 +227,6 @@ struct CPUState { > bool stop; > bool stopped; > volatile sig_atomic_t exit_request; > - volatile sig_atomic_t tcg_exit_req; > uint32_t interrupt_request; > int singlestep_enabled; > int64_t icount_extra; > @@ -272,6 +271,12 @@ struct CPUState { > } icount_decr; > uint32_t can_do_io; > int32_t exception_index; /* used by m68k TCG */ > + > + /* Note that this is accessed at the start of every TB via a negative > + offset from AREG0. Leave this field at the end so as to make the > + (absolute value) offset as small as possible. This reduces code > + size, especially for hosts without large memory offsets. */ > + volatile sig_atomic_t tcg_exit_req; > }; > > QTAILQ_HEAD(CPUTailQ, CPUState); >