[Qemu-devel] [PATCH] cpu: Move tcg_exit_req to the end of CPUState

[Qemu-devel] [PATCH] cpu: Move tcg_exit_req to the end of CPUState

[Richard Henderson]

Reverse an increase in the size of generated code.

Cc: Andreas Färber <afaerber@suse.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 include/qom/cpu.h | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 06ee263..f99885a 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -227,7 +227,6 @@ struct CPUState {
     bool stop;
     bool stopped;
     volatile sig_atomic_t exit_request;
-    volatile sig_atomic_t tcg_exit_req;
     uint32_t interrupt_request;
     int singlestep_enabled;
     int64_t icount_extra;
@@ -272,6 +271,12 @@ struct CPUState {
     } icount_decr;
     uint32_t can_do_io;
     int32_t exception_index; /* used by m68k TCG */
+
+    /* Note that this is accessed at the start of every TB via a negative
+       offset from AREG0.  Leave this field at the end so as to make the
+       (absolute value) offset as small as possible.  This reduces code
+       size, especially for hosts without large memory offsets.  */
+    volatile sig_atomic_t tcg_exit_req;
 };
 
 QTAILQ_HEAD(CPUTailQ, CPUState);
-- 
1.8.5.3

Re: [Qemu-devel] [PATCH] cpu: Move tcg_exit_req to the end of CPUState

[Richard Henderson]

Ping?  This is a significant TCG code size regression
for ARM, AArch64, and Sparc hosts.  It helps x86 too,
though that's not as severe.


r~

On 03/14/2014 03:30 PM, Richard Henderson wrote:
> Reverse an increase in the size of generated code.
> 
> Cc: Andreas Färber <afaerber@suse.de>
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  include/qom/cpu.h | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/include/qom/cpu.h b/include/qom/cpu.h
> index 06ee263..f99885a 100644
> --- a/include/qom/cpu.h
> +++ b/include/qom/cpu.h
> @@ -227,7 +227,6 @@ struct CPUState {
>      bool stop;
>      bool stopped;
>      volatile sig_atomic_t exit_request;
> -    volatile sig_atomic_t tcg_exit_req;
>      uint32_t interrupt_request;
>      int singlestep_enabled;
>      int64_t icount_extra;
> @@ -272,6 +271,12 @@ struct CPUState {
>      } icount_decr;
>      uint32_t can_do_io;
>      int32_t exception_index; /* used by m68k TCG */
> +
> +    /* Note that this is accessed at the start of every TB via a negative
> +       offset from AREG0.  Leave this field at the end so as to make the
> +       (absolute value) offset as small as possible.  This reduces code
> +       size, especially for hosts without large memory offsets.  */
> +    volatile sig_atomic_t tcg_exit_req;
>  };
>  
>  QTAILQ_HEAD(CPUTailQ, CPUState);
> 

Re: [Qemu-devel] [PATCH] cpu: Move tcg_exit_req to the end of CPUState

[Andreas Färber]

Am 19.03.2014 22:04, schrieb Richard Henderson:
> Ping?  This is a significant TCG code size regression
> for ARM, AArch64, and Sparc hosts.  It helps x86 too,
> though that's not as severe.

Sorry, applied to qom-cpu now:
https://github.com/afaerber/qemu-cpu/commits/qom-cpu

How did you find this? Was there some assertion on one target, or do you
have some analysis code that you could share?

Thanks,
Andreas

> 
> 
> r~
> 
> On 03/14/2014 03:30 PM, Richard Henderson wrote:
>> Reverse an increase in the size of generated code.
>>
>> Cc: Andreas Färber <afaerber@suse.de>
>> Signed-off-by: Richard Henderson <rth@twiddle.net>
>> ---
>>  include/qom/cpu.h | 7 ++++++-
>>  1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/qom/cpu.h b/include/qom/cpu.h
>> index 06ee263..f99885a 100644
>> --- a/include/qom/cpu.h
>> +++ b/include/qom/cpu.h
>> @@ -227,7 +227,6 @@ struct CPUState {
>>      bool stop;
>>      bool stopped;
>>      volatile sig_atomic_t exit_request;
>> -    volatile sig_atomic_t tcg_exit_req;
>>      uint32_t interrupt_request;
>>      int singlestep_enabled;
>>      int64_t icount_extra;
>> @@ -272,6 +271,12 @@ struct CPUState {
>>      } icount_decr;
>>      uint32_t can_do_io;
>>      int32_t exception_index; /* used by m68k TCG */
>> +
>> +    /* Note that this is accessed at the start of every TB via a negative
>> +       offset from AREG0.  Leave this field at the end so as to make the
>> +       (absolute value) offset as small as possible.  This reduces code
>> +       size, especially for hosts without large memory offsets.  */
>> +    volatile sig_atomic_t tcg_exit_req;
>>  };
>>  
>>  QTAILQ_HEAD(CPUTailQ, CPUState);
>>
> 
> 


-- 
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GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH] cpu: Move tcg_exit_req to the end of CPUState

[Richard Henderson]

On 03/19/2014 02:13 PM, Andreas Färber wrote:
> Am 19.03.2014 22:04, schrieb Richard Henderson:
>> Ping?  This is a significant TCG code size regression
>> for ARM, AArch64, and Sparc hosts.  It helps x86 too,
>> though that's not as severe.
> 
> Sorry, applied to qom-cpu now:
> https://github.com/afaerber/qemu-cpu/commits/qom-cpu
> 
> How did you find this? Was there some assertion on one target, or do you
> have some analysis code that you could share?

No assertions; all of the targets worked.

I was just reading asm_out dumps as I improved the Sparc backend.
We went from beginning with

0x40000000:  ld  [ %i0 + -76 ], %l0

to

0x40000000:  sethi  %hi(0xffffbc00), %g1
0x40000004:  or  %g1, 0x2ec, %g1        ! 0xffffbeec
0x40000008:  ld  [ %i0 + %g1 ], %l0

That constant is of course -16660, out of range of the 13-bit signed addend.

Then I got to thinking: ARM also has a 13-bit range (though in a silly 1's
compliment form), AArch64 has an 8-bit signed addend, and i386 can use a
smaller encoding for an 8-bit signed addend.  So it could benefit just about
all of the backends to keep this offset relatively small.


r~