From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37652) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WQNnu-0004rb-He for qemu-devel@nongnu.org; Wed, 19 Mar 2014 17:13:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WQNnp-0007KU-BD for qemu-devel@nongnu.org; Wed, 19 Mar 2014 17:13:38 -0400 Received: from cantor2.suse.de ([195.135.220.15]:58206 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WQNnp-0007KN-52 for qemu-devel@nongnu.org; Wed, 19 Mar 2014 17:13:33 -0400 Message-ID: <532A087A.8060801@suse.de> Date: Wed, 19 Mar 2014 22:13:30 +0100 From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= MIME-Version: 1.0 References: <1394836210-15934-1-git-send-email-rth@twiddle.net> <532A0650.3040109@twiddle.net> In-Reply-To: <532A0650.3040109@twiddle.net> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH] cpu: Move tcg_exit_req to the end of CPUState List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson , qemu-devel@nongnu.org Am 19.03.2014 22:04, schrieb Richard Henderson: > Ping? This is a significant TCG code size regression > for ARM, AArch64, and Sparc hosts. It helps x86 too, > though that's not as severe. Sorry, applied to qom-cpu now: https://github.com/afaerber/qemu-cpu/commits/qom-cpu How did you find this? Was there some assertion on one target, or do you have some analysis code that you could share? Thanks, Andreas >=20 >=20 > r~ >=20 > On 03/14/2014 03:30 PM, Richard Henderson wrote: >> Reverse an increase in the size of generated code. >> >> Cc: Andreas F=C3=A4rber >> Signed-off-by: Richard Henderson >> --- >> include/qom/cpu.h | 7 ++++++- >> 1 file changed, 6 insertions(+), 1 deletion(-) >> >> diff --git a/include/qom/cpu.h b/include/qom/cpu.h >> index 06ee263..f99885a 100644 >> --- a/include/qom/cpu.h >> +++ b/include/qom/cpu.h >> @@ -227,7 +227,6 @@ struct CPUState { >> bool stop; >> bool stopped; >> volatile sig_atomic_t exit_request; >> - volatile sig_atomic_t tcg_exit_req; >> uint32_t interrupt_request; >> int singlestep_enabled; >> int64_t icount_extra; >> @@ -272,6 +271,12 @@ struct CPUState { >> } icount_decr; >> uint32_t can_do_io; >> int32_t exception_index; /* used by m68k TCG */ >> + >> + /* Note that this is accessed at the start of every TB via a nega= tive >> + offset from AREG0. Leave this field at the end so as to make = the >> + (absolute value) offset as small as possible. This reduces co= de >> + size, especially for hosts without large memory offsets. */ >> + volatile sig_atomic_t tcg_exit_req; >> }; >> =20 >> QTAILQ_HEAD(CPUTailQ, CPUState); >> >=20 >=20 --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=C3=B6rffer; HRB 16746 AG N=C3=BC= rnberg