From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60066) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WQPLE-00067M-SB for qemu-devel@nongnu.org; Wed, 19 Mar 2014 18:52:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WQP68-0002ea-3j for qemu-devel@nongnu.org; Wed, 19 Mar 2014 18:37:02 -0400 Message-ID: <532A1BEE.8090005@suse.de> Date: Wed, 19 Mar 2014 23:36:30 +0100 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <53272822.8000502@suse.de> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] Multiple pci buses List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: BALATON Zoltan Cc: qemu-ppc , qemu-devel@nongnu.org Am 17.03.2014 23:14, schrieb BALATON Zoltan: > On Mon, 17 Mar 2014, Andreas F=E4rber wrote: >> In earlier times QEMU did not properly support multiple PCI bus domain= s. >> Some code in >> http://git.qemu.org/?p=3Dqemu.git;a=3Dblob;f=3Dhw/pci-host/uninorth.c;= h=3De72fe2a70b954bf5675ad0c8735fea6bad665be6;hb=3DHEAD >> >> is #if 0'ed out that you should take a look at. >=20 > I've seen these #if 0'ed parts but just enabling them does not seem to > be enough. I don't know enough about how should all this work and found > no documentation or examples to follow so I hope someone can explain > what it takes to create two pci buses (so devices added to the first ge= t > 0:dev:func and those added to the second get 1:dev:func addresses) and > these busses have their Cfg/IO/MMIO space mapped to different addresses= . > The patch I came up with so far did not work. The pci buses and memory > map from the dumps I've seen should look like this: >=20 > 0000:00:0b.0 Host bridge [0600]: Apple Computer Inc. UniNorth AGP > [106b:0020] > 0000:00:10.0 VGA compatible controller [0300]: ATI Technologies Inc > Radeon R200 QL [Radeon 8500 LE] [1002:514c] >=20 > 0001:10:0b.0 Host bridge [0600]: Apple Computer Inc. UniNorth PCI > [106b:001f] > 0001:10:0d.0 PCI bridge [0604]: Digital Equipment Corporation DECchip > 21154 [1011:0026] (rev 05) > 0001:11:07.0 Unassigned class [ff00]: Apple Computer Inc. KeyLargo Mac > I/O [106b:0022] (rev 02) >=20 > corresponding to this openfirmware tree: >=20 > ff8721c0: /pci@f0000000 > ff898cd0: /uni-north-agp@b > ff898f40: /ATY,Rage128Ps@10 > ff873268: /pci@f2000000 > ff8742d8: /pci-bridge@d > ff876368: /mac-io@7 >=20 > and the memory mapping is: >=20 > 80000000-8fffffff : /pci@f2000000 > 80000000-800fffff : PCI Bus 0001:11 > 80000000-8007ffff : 0001:11:07.0 > 80000000-8007ffff : 0.80000000:mac-io >=20 > 90000000-9fffffff : /pci@f0000000 > 90000000-9000ffff : 0000:00:10.0 > 90000000-9000ffff : radeonfb mmio >=20 > f1000000-f1ffffff : /pci@f0000000 > f3000000-f3ffffff : /pci@f2000000 >=20 >> I had investigated that some time ago based on a G4 in our office and >> might be able to revive some patches... Please keep me CC'ed. >=20 > If you have any info/patches for this they are very welcome. Just stumbled over a text file of our G4: --->8--- 0000:00:0b.0 Apple Computer Inc. UniNorth AGP [106b:0020] 0001:10:0b.0 Apple Computer Inc. UniNorth PCI [106b:001f] 0001:10:0d.0 Digital Equipment Corporation DECchip 21154 [1011:0026] 0002:21:0b.0 Apple Computer Inc. UniNorth Internal PCI [106b:001e] --->8--- The first three match yours, but I have an additional internal PCI. Cheers, Andreas P.S. Forgot to mention, do not add #if 0s in patches. Either keep code compiling or drop it properly. Otherwise it will bit-rot. --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg