* [Qemu-devel] [PATCH] target-ppc: improve "info registers" by printing SPRs
@ 2014-03-19 14:17 Alexey Kardashevskiy
2014-03-21 17:49 ` Fabien Chouteau
0 siblings, 1 reply; 2+ messages in thread
From: Alexey Kardashevskiy @ 2014-03-19 14:17 UTC (permalink / raw)
To: qemu-devel
Cc: Alexey Kardashevskiy, qemu-ppc, Alexander Graf, Anton Blanchard
This adds printing of all SPR registers registered for a CPU.
This removes "SPR_" prefix from SPR name to reduce the output.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
---
Now it should look like below. Before the user had to attach with gdb
to read SPRs.
(qemu) info registers
NIP 0000000000000100 LR 0000000000000000 CTR 0000000000000000 XER 0000000000000000
MSR 0000000000000000 HID0 0000000000000000 HF 0000000000000000 idx 1
TB 00000000 00000000 DECR 00000000
GPR00 0000000000000000 0000000000000000 0000000000000000 000000000ffb0000
GPR04 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR08 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR12 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR16 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR20 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR24 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR28 0000000000000000 0000000000000000 0000000000000000 0000000000000000
CR 00000000 [ - - - - - - - - ] RES ffffffffffffffff
FPR00 0000000000000000 0000000000000000 0000000000000000 0000000000000000
FPR04 0000000000000000 0000000000000000 0000000000000000 0000000000000000
FPR08 0000000000000000 0000000000000000 0000000000000000 0000000000000000
FPR12 0000000000000000 0000000000000000 0000000000000000 0000000000000000
FPR16 0000000000000000 0000000000000000 0000000000000000 0000000000000000
FPR20 0000000000000000 0000000000000000 0000000000000000 0000000000000000
FPR24 0000000000000000 0000000000000000 0000000000000000 0000000000000000
FPR28 0000000000000000 0000000000000000 0000000000000000 0000000000000000
FPSCR 0000000000000000
XER 0000000000000000 LR 0000000000000000 CTR 0000000000000000 UAMR 0000000000000000
DSCR 0000000000000000 DSISR 0000000000000000 DAR 0000000000000000 DECR 0000000000000000
SDR1 0000000000000005 SRR0 0000000000000000 SRR1 0000000000000000 CFAR 0000000000000000
AMR 0000000000000000 CTRLF 0000000080800000 CTRLT 0000000080800000 UAMOR 0000000000000000
VRSAVE 0000000000000000 TBL 0000000000000000 TBU 0000000000000000 SPRG0 0000000000000000
SPRG1 0000000000000000 SPRG2 0000000000000000 SPRG3 0000000000000000 EAR 0000000000000000
TBL 0000000000000000 TBU 0000000000000000 PVR 00000000003f0201 SPURR 0000000000000000
PURR 0000000000000000 LPCR 0000000000007005 MMCRA 0000000000000000 PPR 0000000000000000
UMMCR0 0000000000000000 UPMC1 0000000000000000 UPMC2 0000000000000000 USIAR 0000000000000000
UMMCR1 0000000000000000 UPMC3 0000000000000000 UPMC4 0000000000000000 PMC5 0000000000000000
PMC6 0000000000000000 MMCR0 0000000000000000 PMC1 0000000000000000 PMC2 0000000000000000
SIAR 0000000000000000 MMCR1 0000000000000000 PMC3 0000000000000000 PMC4 0000000000000000
IABR 0000000000000000 DABR 0000000000000000 ICTC 0000000000000000 PIR 0000000000000000
CFAR 0000000000000000
(qemu)
---
target-ppc/translate.c | 79 +++++++++------------------------------------
target-ppc/translate_init.c | 40 +++++++++++------------
2 files changed, 35 insertions(+), 84 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index e3fcb03..f372744 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -11116,7 +11116,7 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
- int i;
+ int i, j;
cpu_fprintf(f, "NIP " TARGET_FMT_lx " LR " TARGET_FMT_lx " CTR "
TARGET_FMT_lx " XER " TARGET_FMT_lx "\n",
@@ -11167,54 +11167,22 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
cpu_fprintf(f, "\n");
}
cpu_fprintf(f, "FPSCR " TARGET_FMT_lx "\n", env->fpscr);
-#if !defined(CONFIG_USER_ONLY)
- cpu_fprintf(f, " SRR0 " TARGET_FMT_lx " SRR1 " TARGET_FMT_lx
- " PVR " TARGET_FMT_lx " VRSAVE " TARGET_FMT_lx "\n",
- env->spr[SPR_SRR0], env->spr[SPR_SRR1],
- env->spr[SPR_PVR], env->spr[SPR_VRSAVE]);
- cpu_fprintf(f, "SPRG0 " TARGET_FMT_lx " SPRG1 " TARGET_FMT_lx
- " SPRG2 " TARGET_FMT_lx " SPRG3 " TARGET_FMT_lx "\n",
- env->spr[SPR_SPRG0], env->spr[SPR_SPRG1],
- env->spr[SPR_SPRG2], env->spr[SPR_SPRG3]);
-
- cpu_fprintf(f, "SPRG4 " TARGET_FMT_lx " SPRG5 " TARGET_FMT_lx
- " SPRG6 " TARGET_FMT_lx " SPRG7 " TARGET_FMT_lx "\n",
- env->spr[SPR_SPRG4], env->spr[SPR_SPRG5],
- env->spr[SPR_SPRG6], env->spr[SPR_SPRG7]);
-
- if (env->excp_model == POWERPC_EXCP_BOOKE) {
- cpu_fprintf(f, "CSRR0 " TARGET_FMT_lx " CSRR1 " TARGET_FMT_lx
- " MCSRR0 " TARGET_FMT_lx " MCSRR1 " TARGET_FMT_lx "\n",
- env->spr[SPR_BOOKE_CSRR0], env->spr[SPR_BOOKE_CSRR1],
- env->spr[SPR_BOOKE_MCSRR0], env->spr[SPR_BOOKE_MCSRR1]);
-
- cpu_fprintf(f, " TCR " TARGET_FMT_lx " TSR " TARGET_FMT_lx
- " ESR " TARGET_FMT_lx " DEAR " TARGET_FMT_lx "\n",
- env->spr[SPR_BOOKE_TCR], env->spr[SPR_BOOKE_TSR],
- env->spr[SPR_BOOKE_ESR], env->spr[SPR_BOOKE_DEAR]);
-
- cpu_fprintf(f, " PIR " TARGET_FMT_lx " DECAR " TARGET_FMT_lx
- " IVPR " TARGET_FMT_lx " EPCR " TARGET_FMT_lx "\n",
- env->spr[SPR_BOOKE_PIR], env->spr[SPR_BOOKE_DECAR],
- env->spr[SPR_BOOKE_IVPR], env->spr[SPR_BOOKE_EPCR]);
-
- cpu_fprintf(f, " MCSR " TARGET_FMT_lx " SPRG8 " TARGET_FMT_lx
- " EPR " TARGET_FMT_lx "\n",
- env->spr[SPR_BOOKE_MCSR], env->spr[SPR_BOOKE_SPRG8],
- env->spr[SPR_BOOKE_EPR]);
-
- /* FSL-specific */
- cpu_fprintf(f, " MCAR " TARGET_FMT_lx " PID1 " TARGET_FMT_lx
- " PID2 " TARGET_FMT_lx " SVR " TARGET_FMT_lx "\n",
- env->spr[SPR_Exxx_MCAR], env->spr[SPR_BOOKE_PID1],
- env->spr[SPR_BOOKE_PID2], env->spr[SPR_E500_SVR]);
-
- /*
- * IVORs are left out as they are large and do not change often --
- * they can be read with "p $ivor0", "p $ivor1", etc.
- */
+ for (i = 0, j = 0; i < ARRAY_SIZE(env->spr_cb); i++) {
+ ppc_spr_t *spr = &env->spr_cb[i];
+
+ if (!spr->name) {
+ continue;
+ }
+ cpu_fprintf(f, "%-6s " TARGET_FMT_lx, spr->name, env->spr[i]);
+ j++;
+ if (!(j % 4)) {
+ cpu_fprintf(f, "\n");
+ } else {
+ cpu_fprintf(f, " ");
+ }
}
+#if !defined(CONFIG_USER_ONLY)
#if defined(TARGET_PPC64)
if (env->flags & POWERPC_FLAG_CFAR) {
@@ -11233,25 +11201,8 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
case POWERPC_MMU_2_06a:
case POWERPC_MMU_2_06d:
#endif
- cpu_fprintf(f, " SDR1 " TARGET_FMT_lx " DAR " TARGET_FMT_lx
- " DSISR " TARGET_FMT_lx "\n", env->spr[SPR_SDR1],
- env->spr[SPR_DAR], env->spr[SPR_DSISR]);
break;
case POWERPC_MMU_BOOKE206:
- cpu_fprintf(f, " MAS0 " TARGET_FMT_lx " MAS1 " TARGET_FMT_lx
- " MAS2 " TARGET_FMT_lx " MAS3 " TARGET_FMT_lx "\n",
- env->spr[SPR_BOOKE_MAS0], env->spr[SPR_BOOKE_MAS1],
- env->spr[SPR_BOOKE_MAS2], env->spr[SPR_BOOKE_MAS3]);
-
- cpu_fprintf(f, " MAS4 " TARGET_FMT_lx " MAS6 " TARGET_FMT_lx
- " MAS7 " TARGET_FMT_lx " PID " TARGET_FMT_lx "\n",
- env->spr[SPR_BOOKE_MAS4], env->spr[SPR_BOOKE_MAS6],
- env->spr[SPR_BOOKE_MAS7], env->spr[SPR_BOOKE_PID]);
-
- cpu_fprintf(f, "MMUCFG " TARGET_FMT_lx " TLB0CFG " TARGET_FMT_lx
- " TLB1CFG " TARGET_FMT_lx "\n",
- env->spr[SPR_MMUCFG], env->spr[SPR_BOOKE_TLB0CFG],
- env->spr[SPR_BOOKE_TLB1CFG]);
break;
default:
break;
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 954dee3..4d199c1 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -3834,7 +3834,7 @@ static void init_proc_460 (CPUPPCState *env)
&spr_read_generic, &spr_write_generic,
0x00000000);
/* XXX : not implemented */
- spr_register(env, SPR_DCRIPR, "SPR_DCRIPR",
+ spr_register(env, SPR_DCRIPR, "DCRIPR",
&spr_read_generic, &spr_write_generic,
&spr_read_generic, &spr_write_generic,
0x00000000);
@@ -3930,7 +3930,7 @@ static void init_proc_460F (CPUPPCState *env)
&spr_read_generic, &spr_write_generic,
0x00000000);
/* XXX : not implemented */
- spr_register(env, SPR_DCRIPR, "SPR_DCRIPR",
+ spr_register(env, SPR_DCRIPR, "DCRIPR",
&spr_read_generic, &spr_write_generic,
&spr_read_generic, &spr_write_generic,
0x00000000);
@@ -6654,7 +6654,7 @@ static void init_proc_970 (CPUPPCState *env)
/* Memory management */
/* XXX: not correct */
gen_low_BATs(env);
- spr_register(env, SPR_HIOR, "SPR_HIOR",
+ spr_register(env, SPR_HIOR, "HIOR",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_hior, &spr_write_hior,
0x00000000);
@@ -6734,19 +6734,19 @@ static void init_proc_970FX (CPUPPCState *env)
/* Memory management */
/* XXX: not correct */
gen_low_BATs(env);
- spr_register(env, SPR_HIOR, "SPR_HIOR",
+ spr_register(env, SPR_HIOR, "HIOR",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_hior, &spr_write_hior,
0x00000000);
- spr_register(env, SPR_CTRL, "SPR_CTRL",
+ spr_register(env, SPR_CTRL, "CTRL",
SPR_NOACCESS, SPR_NOACCESS,
SPR_NOACCESS, &spr_write_generic,
0x00000000);
- spr_register(env, SPR_UCTRL, "SPR_UCTRL",
+ spr_register(env, SPR_UCTRL, "UCTRL",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, SPR_NOACCESS,
0x00000000);
- spr_register(env, SPR_VRSAVE, "SPR_VRSAVE",
+ spr_register(env, SPR_VRSAVE, "VRSAVE",
&spr_read_generic, &spr_write_generic,
&spr_read_generic, &spr_write_generic,
0x00000000);
@@ -6827,7 +6827,7 @@ static void init_proc_970MP (CPUPPCState *env)
/* Memory management */
/* XXX: not correct */
gen_low_BATs(env);
- spr_register(env, SPR_HIOR, "SPR_HIOR",
+ spr_register(env, SPR_HIOR, "HIOR",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_hior, &spr_write_hior,
0x00000000);
@@ -6904,19 +6904,19 @@ static void init_proc_power5plus(CPUPPCState *env)
/* Memory management */
/* XXX: not correct */
gen_low_BATs(env);
- spr_register(env, SPR_HIOR, "SPR_HIOR",
+ spr_register(env, SPR_HIOR, "HIOR",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_hior, &spr_write_hior,
0x00000000);
- spr_register(env, SPR_CTRL, "SPR_CTRL",
+ spr_register(env, SPR_CTRL, "CTRL",
SPR_NOACCESS, SPR_NOACCESS,
SPR_NOACCESS, &spr_write_generic,
0x00000000);
- spr_register(env, SPR_UCTRL, "SPR_UCTRL",
+ spr_register(env, SPR_UCTRL, "UCTRL",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, SPR_NOACCESS,
0x00000000);
- spr_register(env, SPR_VRSAVE, "SPR_VRSAVE",
+ spr_register(env, SPR_VRSAVE, "VRSAVE",
&spr_read_generic, &spr_write_generic,
&spr_read_generic, &spr_write_generic,
0x00000000);
@@ -6990,38 +6990,38 @@ static void init_proc_POWER7 (CPUPPCState *env)
&spr_read_purr, SPR_NOACCESS,
&spr_read_purr, SPR_NOACCESS,
KVM_REG_PPC_SPURR, 0x00000000);
- spr_register(env, SPR_CFAR, "SPR_CFAR",
+ spr_register(env, SPR_CFAR, "CFAR",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_cfar, &spr_write_cfar,
0x00000000);
- spr_register_kvm(env, SPR_DSCR, "SPR_DSCR",
+ spr_register_kvm(env, SPR_DSCR, "DSCR",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
KVM_REG_PPC_DSCR, 0x00000000);
- spr_register_kvm(env, SPR_MMCRA, "SPR_MMCRA",
+ spr_register_kvm(env, SPR_MMCRA, "MMCRA",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
KVM_REG_PPC_MMCRA, 0x00000000);
- spr_register_kvm(env, SPR_PMC5, "SPR_PMC5",
+ spr_register_kvm(env, SPR_PMC5, "PMC5",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
KVM_REG_PPC_PMC5, 0x00000000);
- spr_register_kvm(env, SPR_PMC6, "SPR_PMC6",
+ spr_register_kvm(env, SPR_PMC6, "PMC6",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
KVM_REG_PPC_PMC6, 0x00000000);
#endif /* !CONFIG_USER_ONLY */
gen_spr_amr(env);
/* XXX : not implemented */
- spr_register(env, SPR_CTRL, "SPR_CTRLT",
+ spr_register(env, SPR_CTRL, "CTRLT",
SPR_NOACCESS, SPR_NOACCESS,
SPR_NOACCESS, &spr_write_generic,
0x80800000);
- spr_register(env, SPR_UCTRL, "SPR_CTRLF",
+ spr_register(env, SPR_UCTRL, "CTRLF",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, SPR_NOACCESS,
0x80800000);
- spr_register(env, SPR_VRSAVE, "SPR_VRSAVE",
+ spr_register(env, SPR_VRSAVE, "VRSAVE",
&spr_read_generic, &spr_write_generic,
&spr_read_generic, &spr_write_generic,
0x00000000);
--
1.8.4.rc4
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [Qemu-devel] [PATCH] target-ppc: improve "info registers" by printing SPRs
2014-03-19 14:17 [Qemu-devel] [PATCH] target-ppc: improve "info registers" by printing SPRs Alexey Kardashevskiy
@ 2014-03-21 17:49 ` Fabien Chouteau
0 siblings, 0 replies; 2+ messages in thread
From: Fabien Chouteau @ 2014-03-21 17:49 UTC (permalink / raw)
To: Alexey Kardashevskiy, qemu-devel
Cc: qemu-ppc, Alexander Graf, Anton Blanchard
On 03/19/2014 03:17 PM, Alexey Kardashevskiy wrote:
> This adds printing of all SPR registers registered for a CPU.
>
> This removes "SPR_" prefix from SPR name to reduce the output.
>
> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
> ---
>
Very useful patch Alexey,
I have few comments:
> + for (i = 0, j = 0; i < ARRAY_SIZE(env->spr_cb); i++) {
> + ppc_spr_t *spr = &env->spr_cb[i];
> +
> + if (!spr->name) {
> + continue;
> + }
> + cpu_fprintf(f, "%-6s " TARGET_FMT_lx, spr->name, env->spr[i]);
> + j++;
> + if (!(j % 4)) {
> + cpu_fprintf(f, "\n");
> + } else {
> + cpu_fprintf(f, " ");
> + }
> }
When the number of register is not a multiple of 4 a "\n" is missing.
e.g.
XER 00000000 LR 00000000 CTR 00000000 DECR 00000000
SRR0 0010c4d4 SRR1 00001030 PID 00000001 DECAR 000a7d8c
CSRR0 00000000 CSRR1 00000000 DEAR 01c7201c ESR 00000000
IVPR 00000000 USPRG0 00000000 USPRG4 00000000 USPRG5 00000000
USPRG6 00000000 USPRG7 00000000 TBL 00000000 TBU 00000000
SPRG0 02069030 SPRG1 00000000 SPRG2 002724bc SPRG3 80804080
SPRG4 00000000 SPRG5 00000000 SPRG6 00000000 SPRG7 00000000
TBL 00000000 TBU 00000000 PIR 00000000 PVR 80210030
DBSR 00000000 DBCR0 00000000 DBCR1 00000000 DBCR2 00000000
IAC1 00000000 IAC2 00000000 DAC1 00000000 DAC2 00000000
TSR 00000000 TCR 05c16000 IVOR0 00000100 IVOR1 00000200
IVOR2 00000300 IVOR3 00000400 IVOR4 00000500 IVOR5 00000600
IVOR6 00000700 IVOR7 00000800 IVOR8 00000900 IVOR9 00000a00
IVOR10 00000b00 IVOR11 00000c00 IVOR12 00000d00 IVOR13 00000e00
IVOR14 00000f00 IVOR15 00001000 SPEFSCR 00000000 BBEAR 00000000
BBTAR 00000000 L1CFG0 00003820 NPIDR 00000000 IVOR32 00001100
IVOR33 00001200 IVOR34 00001300 IVOR35 00001400 MCSRR0 00000000
MCSRR1 00000000 MCSR 00000000 MCAR 00000000 MAS0 00010002
MAS1 80001000 MAS2 01c72004 MAS3 01c72015 MAS4 00000000
MAS6 00010001 PID1 00000000 PID2 00000000 TLB0CFG 04110200
TLB1CFG 101cc010 EPR 00000000 MAS7 00000000 HID0 80804080
HID1 00023000 L1CSR0 00000001 L1CSR1 00000001 MMUCSR0 00000000
BUCSR 00000201 MMUCFG 00000000 SVR 00000000 (qemu)
> +#if !defined(CONFIG_USER_ONLY)
>
> #if defined(TARGET_PPC64)
> if (env->flags & POWERPC_FLAG_CFAR) {
> @@ -11233,25 +11201,8 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
> case POWERPC_MMU_2_06a:
> case POWERPC_MMU_2_06d:
> #endif
> - cpu_fprintf(f, " SDR1 " TARGET_FMT_lx " DAR " TARGET_FMT_lx
> - " DSISR " TARGET_FMT_lx "\n", env->spr[SPR_SDR1],
> - env->spr[SPR_DAR], env->spr[SPR_DSISR]);
> break;
> case POWERPC_MMU_BOOKE206:
> - cpu_fprintf(f, " MAS0 " TARGET_FMT_lx " MAS1 " TARGET_FMT_lx
> - " MAS2 " TARGET_FMT_lx " MAS3 " TARGET_FMT_lx "\n",
> - env->spr[SPR_BOOKE_MAS0], env->spr[SPR_BOOKE_MAS1],
> - env->spr[SPR_BOOKE_MAS2], env->spr[SPR_BOOKE_MAS3]);
> -
> - cpu_fprintf(f, " MAS4 " TARGET_FMT_lx " MAS6 " TARGET_FMT_lx
> - " MAS7 " TARGET_FMT_lx " PID " TARGET_FMT_lx "\n",
> - env->spr[SPR_BOOKE_MAS4], env->spr[SPR_BOOKE_MAS6],
> - env->spr[SPR_BOOKE_MAS7], env->spr[SPR_BOOKE_PID]);
> -
> - cpu_fprintf(f, "MMUCFG " TARGET_FMT_lx " TLB0CFG " TARGET_FMT_lx
> - " TLB1CFG " TARGET_FMT_lx "\n",
> - env->spr[SPR_MMUCFG], env->spr[SPR_BOOKE_TLB0CFG],
> - env->spr[SPR_BOOKE_TLB1CFG]);
> break;
If you remove those lines, the "switch (env->mmu_model)" is empty. You
should remove it entirely then.
Regards,
^ permalink raw reply [flat|nested] 2+ messages in thread
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