Re: [Qemu-devel] [PATCH 01/26] tcg-aarch64: Properly detect SIGSEGV writes

[Claudio Fontana <claudio.fontana@huawei.com>]

On 15.03.2014 03:48, Richard Henderson wrote:
> Since the kernel doesn't pass any info on the reason for the fault,
> disassemble the instruction to detect a store.
> 
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  user-exec.c | 29 +++++++++++++++++++++++------
>  1 file changed, 23 insertions(+), 6 deletions(-)
> 
> diff --git a/user-exec.c b/user-exec.c
> index bc58056..4c0cd46 100644
> --- a/user-exec.c
> +++ b/user-exec.c
> @@ -465,16 +465,33 @@ int cpu_signal_handler(int host_signum, void *pinfo,
>  
>  #elif defined(__aarch64__)
>  
> -int cpu_signal_handler(int host_signum, void *pinfo,
> -                       void *puc)
> +int cpu_signal_handler(int host_signum, void *pinfo, void *puc)
>  {
>      siginfo_t *info = pinfo;
>      struct ucontext *uc = puc;
> -    uint64_t pc;
> -    int is_write = 0; /* XXX how to determine? */
> +    uintptr_t pc = uc->uc_mcontext.pc;
> +    uint32_t insn = *(uint32_t *)pc;
> +    bool is_write;
>  
> -    pc = uc->uc_mcontext.pc;
> -    return handle_cpu_signal(pc, (uint64_t)info->si_addr,
> +    /* XXX: need kernel patch to get write flag faster.  */
> +    /* XXX: several of these could be combined.  */
> +    is_write = (   (insn & 0xbfff0000) == 0x0c000000   /* C3.3.1 */
> +                || (insn & 0xbfe00000) == 0x0c800000   /* C3.3.2 */
> +                || (insn & 0xbfff0000) == 0x0d000000   /* C3.3.3 */

I see you exclude the instructions with bit R=1.
Is there a reason why 'R'(eplicate) instructions are not to be considered stores here?

> +                || (insn & 0xbfe00000) == 0x0d800000   /* C3.3.4 */
> +                || (insn & 0x3f400000) == 0x08000000   /* C3.3.6 */
> +                || (insn & 0x3bc00000) == 0x28400000   /* C3.3.7 */
> +                || (insn & 0x3be00c00) == 0x38000400   /* C3.3.8 */
> +                || (insn & 0x3be00c00) == 0x38000c00   /* C3.3.9 */
> +                || (insn & 0x3be00c00) == 0x38200800   /* C3.3.10 */
> +                || (insn & 0x3be00c00) == 0x38000800   /* C3.3.11 */
> +                || (insn & 0x3be00c00) == 0x38000000   /* C3.3.12 */
> +                || (insn & 0x3bc00000) == 0x39000000   /* C3.3.13 */
> +                || (insn & 0x3bc00000) == 0x29000000   /* C3.3.14 */
> +                || (insn & 0x3bc00000) == 0x28800000   /* C3.3.15 */
> +                || (insn & 0x3bc00000) == 0x29800000); /* C3.3.16 */
> +
> +    return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
>                               is_write, &uc->uc_sigmask, puc);
>  }
>  
> 

Thank you,

Claudio