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From: Claudio Fontana <claudio.fontana@huawei.com>
To: Richard Henderson <rth@twiddle.net>, qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, claudio.fontana@gmail.com
Subject: Re: [Qemu-devel] [PATCH 03/26] tcg-aarch64: Use TCGType and TCGMemOp constants
Date: Mon, 24 Mar 2014 13:52:27 +0100	[thread overview]
Message-ID: <53302A8B.1030402@huawei.com> (raw)
In-Reply-To: <1394851732-25692-4-git-send-email-rth@twiddle.net>

On 15.03.2014 03:48, Richard Henderson wrote:
> Rather than raw constants that could mean anything.
> 
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  tcg/aarch64/tcg-target.c | 71 +++++++++++++++++++++++++-----------------------
>  1 file changed, 37 insertions(+), 34 deletions(-)
> 
> diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c
> index 6938248..47f4708 100644
> --- a/tcg/aarch64/tcg-target.c
> +++ b/tcg/aarch64/tcg-target.c
> @@ -595,7 +595,7 @@ static inline void tcg_out_mov(TCGContext *s,
>                                 TCGType type, TCGReg ret, TCGReg arg)
>  {
>      if (ret != arg) {
> -        tcg_out_movr(s, type == TCG_TYPE_I64, ret, arg);
> +        tcg_out_movr(s, type, ret, arg);
>      }
>  }
>  
> @@ -828,19 +828,19 @@ static inline void tcg_out_rev16(TCGContext *s, TCGType ext,
>      tcg_out32(s, base | rm << 5 | rd);
>  }
>  
> -static inline void tcg_out_sxt(TCGContext *s, TCGType ext, int s_bits,
> +static inline void tcg_out_sxt(TCGContext *s, TCGType ext, TCGMemOp s_bits,
>                                 TCGReg rd, TCGReg rn)
>  {
>      /* Using ALIASes SXTB, SXTH, SXTW, of SBFM Xd, Xn, #0, #7|15|31 */
> -    int bits = 8 * (1 << s_bits) - 1;
> +    int bits = (8 << s_bits) - 1;
>      tcg_out_sbfm(s, ext, rd, rn, 0, bits);
>  }
>  
> -static inline void tcg_out_uxt(TCGContext *s, int s_bits,
> +static inline void tcg_out_uxt(TCGContext *s, TCGMemOp s_bits,
>                                 TCGReg rd, TCGReg rn)
>  {
>      /* Using ALIASes UXTB, UXTH of UBFM Wd, Wn, #0, #7|15 */
> -    int bits = 8 * (1 << s_bits) - 1;
> +    int bits = (8 << s_bits) - 1;
>      tcg_out_ubfm(s, 0, rd, rn, 0, bits);
>  }
>  
> @@ -949,19 +949,21 @@ static const void * const qemu_st_helpers[4] = {
>  
>  static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
>  {
> +    TCGMemOp opc = lb->opc;
> +    TCGMemOp size = opc & MO_SIZE;
> +
>      reloc_pc19(lb->label_ptr[0], (intptr_t)s->code_ptr);
>  
> -    tcg_out_movr(s, 1, TCG_REG_X0, TCG_AREG0);
> -    tcg_out_movr(s, (TARGET_LONG_BITS == 64), TCG_REG_X1, lb->addrlo_reg);
> +    tcg_out_movr(s, TCG_TYPE_I64, TCG_REG_X0, TCG_AREG0);
> +    tcg_out_movr(s, TARGET_LONG_BITS == 64, TCG_REG_X1, lb->addrlo_reg);
>      tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_X2, lb->mem_index);
>      tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_X3, (intptr_t)lb->raddr);
> -    tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP,
> -                 (intptr_t)qemu_ld_helpers[lb->opc & 3]);
> +    tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP, (intptr_t)qemu_ld_helpers[size]);
>      tcg_out_callr(s, TCG_REG_TMP);
> -    if (lb->opc & 0x04) {
> -        tcg_out_sxt(s, 1, lb->opc & 3, lb->datalo_reg, TCG_REG_X0);
> +    if (opc & MO_SIGN) {
> +        tcg_out_sxt(s, TCG_TYPE_I64, size, lb->datalo_reg, TCG_REG_X0);
>      } else {
> -        tcg_out_movr(s, 1, lb->datalo_reg, TCG_REG_X0);
> +        tcg_out_movr(s, TCG_TYPE_I64, lb->datalo_reg, TCG_REG_X0);
>      }
>  
>      tcg_out_goto(s, (intptr_t)lb->raddr);
> @@ -969,15 +971,16 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
>  
>  static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
>  {
> +    TCGMemOp size = lb->opc;
> +
>      reloc_pc19(lb->label_ptr[0], (intptr_t)s->code_ptr);
>  
> -    tcg_out_movr(s, 1, TCG_REG_X0, TCG_AREG0);
> -    tcg_out_movr(s, (TARGET_LONG_BITS == 64), TCG_REG_X1, lb->addrlo_reg);
> -    tcg_out_movr(s, 1, TCG_REG_X2, lb->datalo_reg);
> +    tcg_out_movr(s, TCG_TYPE_I64, TCG_REG_X0, TCG_AREG0);
> +    tcg_out_movr(s, TARGET_LONG_BITS == 64, TCG_REG_X1, lb->addrlo_reg);
> +    tcg_out_movr(s, size == MO_64, TCG_REG_X2, lb->datalo_reg);
>      tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_X3, lb->mem_index);
>      tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_X4, (intptr_t)lb->raddr);
> -    tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP,
> -                 (intptr_t)qemu_st_helpers[lb->opc & 3]);
> +    tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP, (intptr_t)qemu_st_helpers[size]);
>      tcg_out_callr(s, TCG_REG_TMP);
>      tcg_out_goto(s, (intptr_t)lb->raddr);
>  }
> @@ -1061,14 +1064,14 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, int opc, TCGReg data_r,
>      case 1:
>          tcg_out_ldst_r(s, LDST_16, LDST_LD, data_r, addr_r, off_r);
>          if (TCG_LDST_BSWAP) {
> -            tcg_out_rev16(s, 0, data_r, data_r);
> +            tcg_out_rev16(s, TCG_TYPE_I32, data_r, data_r);
>          }
>          break;
>      case 1 | 4:
>          if (TCG_LDST_BSWAP) {
>              tcg_out_ldst_r(s, LDST_16, LDST_LD, data_r, addr_r, off_r);
> -            tcg_out_rev16(s, 0, data_r, data_r);
> -            tcg_out_sxt(s, 1, 1, data_r, data_r);
> +            tcg_out_rev16(s, TCG_TYPE_I32, data_r, data_r);
> +            tcg_out_sxt(s, TCG_TYPE_I64, MO_16, data_r, data_r);
>          } else {
>              tcg_out_ldst_r(s, LDST_16, LDST_LD_S_X, data_r, addr_r, off_r);
>          }
> @@ -1076,14 +1079,14 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, int opc, TCGReg data_r,
>      case 2:
>          tcg_out_ldst_r(s, LDST_32, LDST_LD, data_r, addr_r, off_r);
>          if (TCG_LDST_BSWAP) {
> -            tcg_out_rev(s, 0, data_r, data_r);
> +            tcg_out_rev(s, TCG_TYPE_I32, data_r, data_r);
>          }
>          break;
>      case 2 | 4:
>          if (TCG_LDST_BSWAP) {
>              tcg_out_ldst_r(s, LDST_32, LDST_LD, data_r, addr_r, off_r);
> -            tcg_out_rev(s, 0, data_r, data_r);
> -            tcg_out_sxt(s, 1, 2, data_r, data_r);
> +            tcg_out_rev(s, TCG_TYPE_I32, data_r, data_r);
> +            tcg_out_sxt(s, TCG_TYPE_I64, MO_32, data_r, data_r);
>          } else {
>              tcg_out_ldst_r(s, LDST_32, LDST_LD_S_X, data_r, addr_r, off_r);
>          }
> @@ -1091,7 +1094,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, int opc, TCGReg data_r,
>      case 3:
>          tcg_out_ldst_r(s, LDST_64, LDST_LD, data_r, addr_r, off_r);
>          if (TCG_LDST_BSWAP) {
> -            tcg_out_rev(s, 1, data_r, data_r);
> +            tcg_out_rev(s, TCG_TYPE_I64, data_r, data_r);
>          }
>          break;
>      default:
> @@ -1108,7 +1111,7 @@ static void tcg_out_qemu_st_direct(TCGContext *s, int opc, TCGReg data_r,
>          break;
>      case 1:
>          if (TCG_LDST_BSWAP) {
> -            tcg_out_rev16(s, 0, TCG_REG_TMP, data_r);
> +            tcg_out_rev16(s, TCG_TYPE_I32, TCG_REG_TMP, data_r);
>              tcg_out_ldst_r(s, LDST_16, LDST_ST, TCG_REG_TMP, addr_r, off_r);
>          } else {
>              tcg_out_ldst_r(s, LDST_16, LDST_ST, data_r, addr_r, off_r);
> @@ -1116,7 +1119,7 @@ static void tcg_out_qemu_st_direct(TCGContext *s, int opc, TCGReg data_r,
>          break;
>      case 2:
>          if (TCG_LDST_BSWAP) {
> -            tcg_out_rev(s, 0, TCG_REG_TMP, data_r);
> +            tcg_out_rev(s, TCG_TYPE_I32, TCG_REG_TMP, data_r);
>              tcg_out_ldst_r(s, LDST_32, LDST_ST, TCG_REG_TMP, addr_r, off_r);
>          } else {
>              tcg_out_ldst_r(s, LDST_32, LDST_ST, data_r, addr_r, off_r);
> @@ -1124,7 +1127,7 @@ static void tcg_out_qemu_st_direct(TCGContext *s, int opc, TCGReg data_r,
>          break;
>      case 3:
>          if (TCG_LDST_BSWAP) {
> -            tcg_out_rev(s, 1, TCG_REG_TMP, data_r);
> +            tcg_out_rev(s, TCG_TYPE_I64, TCG_REG_TMP, data_r);
>              tcg_out_ldst_r(s, LDST_64, LDST_ST, TCG_REG_TMP, addr_r, off_r);
>          } else {
>              tcg_out_ldst_r(s, LDST_64, LDST_ST, data_r, addr_r, off_r);
> @@ -1547,30 +1550,30 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
>          break;
>      case INDEX_op_bswap16_i64:
>      case INDEX_op_bswap16_i32:
> -        tcg_out_rev16(s, 0, a0, a1);
> +        tcg_out_rev16(s, TCG_TYPE_I32, a0, a1);
>          break;
>  
>      case INDEX_op_ext8s_i64:
>      case INDEX_op_ext8s_i32:
> -        tcg_out_sxt(s, ext, 0, a0, a1);
> +        tcg_out_sxt(s, ext, MO_8, a0, a1);
>          break;
>      case INDEX_op_ext16s_i64:
>      case INDEX_op_ext16s_i32:
> -        tcg_out_sxt(s, ext, 1, a0, a1);
> +        tcg_out_sxt(s, ext, MO_16, a0, a1);
>          break;
>      case INDEX_op_ext32s_i64:
> -        tcg_out_sxt(s, 1, 2, a0, a1);
> +        tcg_out_sxt(s, TCG_TYPE_I64, MO_32, a0, a1);
>          break;
>      case INDEX_op_ext8u_i64:
>      case INDEX_op_ext8u_i32:
> -        tcg_out_uxt(s, 0, a0, a1);
> +        tcg_out_uxt(s, MO_8, a0, a1);
>          break;
>      case INDEX_op_ext16u_i64:
>      case INDEX_op_ext16u_i32:
> -        tcg_out_uxt(s, 1, a0, a1);
> +        tcg_out_uxt(s, MO_16, a0, a1);
>          break;
>      case INDEX_op_ext32u_i64:
> -        tcg_out_movr(s, 0, a0, a1);
> +        tcg_out_movr(s, TCG_TYPE_I32, a0, a1);
>          break;
>  
>      case INDEX_op_deposit_i64:
> 

Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>


-- 
Claudio Fontana
Server Virtualization Architect
Huawei Technologies Duesseldorf GmbH
Riesstraße 25 - 80992 München

office: +49 89 158834 4135
mobile: +49 15253060158

  reply	other threads:[~2014-03-24 12:53 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-15  2:48 [Qemu-devel] [PATCH 00/26] tcg/aarch64 improvements, part 3 Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 01/26] tcg-aarch64: Properly detect SIGSEGV writes Richard Henderson
2014-03-24 11:05   ` Claudio Fontana
2014-03-24 15:33     ` Richard Henderson
2014-03-24 11:45   ` Claudio Fontana
2014-03-24 12:17   ` Peter Maydell
2014-03-24 12:41   ` Peter Maydell
2014-03-24 15:27     ` Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 02/26] tcg-aarch64: Use intptr_t apropriately Richard Henderson
2014-03-24 12:12   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 03/26] tcg-aarch64: Use TCGType and TCGMemOp constants Richard Henderson
2014-03-24 12:52   ` Claudio Fontana [this message]
2014-03-15  2:48 ` [Qemu-devel] [PATCH 04/26] tcg-aarch64: Use MOVN in tcg_out_movi Richard Henderson
2014-03-24 14:06   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 05/26] tcg-aarch64: Use ORRI " Richard Henderson
2014-03-24 14:06   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 06/26] tcg-aarch64: Special case small constants " Richard Henderson
2014-03-24 14:08   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 07/26] tcg-aarch64: Use adrp " Richard Henderson
2014-03-24 14:05   ` Claudio Fontana
2014-03-24 15:36     ` Richard Henderson
2014-03-26  9:34   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 08/26] tcg-aarch64: Use symbolic names for branches Richard Henderson
2014-03-24 15:31   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 09/26] tcg-aarch64: Create tcg_out_brcond Richard Henderson
2014-03-24 15:31   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 10/26] tcg-aarch64: Use CBZ and CBNZ Richard Henderson
2014-03-24 15:32   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 11/26] tcg-aarch64: Reuse FP and LR in translated code Richard Henderson
2014-03-28  9:48   ` Claudio Fontana
2014-03-28 13:23     ` Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 12/26] tcg-aarch64: Introduce tcg_out_insn_3314 Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 13/26] tcg-aarch64: Rearrange prologue insn order Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 14/26] tcg-aarch64: Implement tcg_register_jit Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 15/26] tcg-aarch64: Avoid add with zero in tlb load Richard Henderson
2014-03-26  9:36   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 16/26] tcg-aarch64: Use tcg_out_call for qemu_ld/st Richard Henderson
2014-03-26  9:37   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 17/26] tcg-aarch64: Use ADR to pass the return address to the ld/st helpers Richard Henderson
2014-03-26  9:38   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 18/26] tcg-aarch64: Use TCGMemOp in qemu_ld/st Richard Henderson
2014-03-26  9:39   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 19/26] tcg-aarch64: Implement TCG_TARGET_HAS_new_ldst Richard Henderson
2014-03-26  9:40   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 20/26] tcg-aarch64: Introduce tcg_out_insn_3507 Richard Henderson
2014-03-26  9:40   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 21/26] tcg-aarch64: Merge aarch64_ldst_get_data/type into tcg_out_op Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 22/26] tcg-aarch64: Replace aarch64_ldst_op_data with TCGMemOp Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 23/26] tcg-aarch64: Replace aarch64_ldst_op_data with AArch64LdstType Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 24/26] tcg-aarch64: Prefer unsigned offsets before signed offsets for ldst Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 25/26] tcg-aarch64: Merge tcg_out_movr with tcg_out_mov Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 26/26] tcg-aarch64: Support stores of zero Richard Henderson

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