From: Claudio Fontana <claudio.fontana@huawei.com>
To: Richard Henderson <rth@twiddle.net>, qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>, claudio.fontana@gmail.com
Subject: Re: [Qemu-devel] [PATCH v3 01/26] tcg-aarch64: Properly detect SIGSEGV writes
Date: Mon, 7 Apr 2014 09:58:00 +0200 [thread overview]
Message-ID: <53425A88.2050806@huawei.com> (raw)
In-Reply-To: <1396555000-8205-2-git-send-email-rth@twiddle.net>
On 03.04.2014 21:56, Richard Henderson wrote:
> Since the kernel doesn't pass any info on the reason for the fault,
> disassemble the instruction to detect a store.
>
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
> user-exec.c | 29 +++++++++++++++++++++++------
> 1 file changed, 23 insertions(+), 6 deletions(-)
>
> diff --git a/user-exec.c b/user-exec.c
> index bc58056..52f76c9 100644
> --- a/user-exec.c
> +++ b/user-exec.c
> @@ -465,16 +465,33 @@ int cpu_signal_handler(int host_signum, void *pinfo,
>
> #elif defined(__aarch64__)
>
> -int cpu_signal_handler(int host_signum, void *pinfo,
> - void *puc)
> +int cpu_signal_handler(int host_signum, void *pinfo, void *puc)
> {
> siginfo_t *info = pinfo;
> struct ucontext *uc = puc;
> - uint64_t pc;
> - int is_write = 0; /* XXX how to determine? */
> + uintptr_t pc = uc->uc_mcontext.pc;
> + uint32_t insn = *(uint32_t *)pc;
> + bool is_write;
>
> - pc = uc->uc_mcontext.pc;
> - return handle_cpu_signal(pc, (uint64_t)info->si_addr,
> + /* XXX: need kernel patch to get write flag faster. */
> + /* XXX: several of these could be combined. */
> + is_write = ( (insn & 0xbfff0000) == 0x0c000000 /* C3.3.1 */
> + || (insn & 0xbfe00000) == 0x0c800000 /* C3.3.2 */
> + || (insn & 0xbfdf0000) == 0x0d000000 /* C3.3.3 */
> + || (insn & 0xbfc00000) == 0x0d800000 /* C3.3.4 */
> + || (insn & 0x3f400000) == 0x08000000 /* C3.3.6 */
> + || (insn & 0x3bc00000) == 0x28400000 /* C3.3.7 */
I think the Load (L) bit should be 0 here so
== 0x28000000
> + || (insn & 0x3be00c00) == 0x38000400 /* C3.3.8 */
With V=1, an opc of 0b10 is also a write, I think. It's the 128bit FP/SIMD STR.
> + || (insn & 0x3be00c00) == 0x38000c00 /* C3.3.9 */
Same here.
> + || (insn & 0x3be00c00) == 0x38200800 /* C3.3.10 */
Same.
> + || (insn & 0x3be00c00) == 0x38000800 /* C3.3.11 */
> + || (insn & 0x3be00c00) == 0x38000000 /* C3.3.12 */
Same.
> + || (insn & 0x3bc00000) == 0x39000000 /* C3.3.13 */
Same.
> + || (insn & 0x3bc00000) == 0x29000000 /* C3.3.14 */
> + || (insn & 0x3bc00000) == 0x28800000 /* C3.3.15 */
> + || (insn & 0x3bc00000) == 0x29800000); /* C3.3.16 */
> +
> + return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
> is_write, &uc->uc_sigmask, puc);
> }
>
>
Thanks,
Claudio
next prev parent reply other threads:[~2014-04-07 7:58 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-03 19:56 [Qemu-devel] [PATCH v2 00/26] tcg-aarch64 improvements, part 3 Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 01/26] tcg-aarch64: Properly detect SIGSEGV writes Richard Henderson
2014-04-07 7:58 ` Claudio Fontana [this message]
2014-04-07 16:33 ` Richard Henderson
2014-04-07 16:39 ` Peter Maydell
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 02/26] tcg-aarch64: Use intptr_t apropriately Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 03/26] tcg-aarch64: Use TCGType and TCGMemOp constants Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 04/26] tcg-aarch64: Use MOVN in tcg_out_movi Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 05/26] tcg-aarch64: Use ORRI " Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 06/26] tcg-aarch64: Special case small constants " Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 07/26] tcg-aarch64: Use adrp " Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 08/26] tcg-aarch64: Use symbolic names for branches Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 09/26] tcg-aarch64: Create tcg_out_brcond Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 10/26] tcg-aarch64: Use CBZ and CBNZ Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 11/26] tcg-aarch64: Reuse LR in translated code Richard Henderson
2014-04-07 8:03 ` Claudio Fontana
2014-04-07 9:49 ` Peter Maydell
2014-04-07 11:11 ` Claudio Fontana
2014-04-07 11:28 ` Peter Maydell
2014-04-11 12:33 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 12/26] tcg-aarch64: Introduce tcg_out_insn_3314 Richard Henderson
2014-04-11 12:34 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 13/26] tcg-aarch64: Implement tcg_register_jit Richard Henderson
2014-04-11 12:34 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 14/26] tcg-aarch64: Avoid add with zero in tlb load Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 15/26] tcg-aarch64: Use tcg_out_call for qemu_ld/st Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 16/26] tcg-aarch64: Use ADR to pass the return address to the ld/st helpers Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 17/26] tcg-aarch64: Use TCGMemOp in qemu_ld/st Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 18/26] tcg-aarch64: Pass qemu_ld/st arguments directly Richard Henderson
2014-04-11 12:34 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 19/26] tcg-aarch64: Implement TCG_TARGET_HAS_new_ldst Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 20/26] tcg-aarch64: Support stores of zero Richard Henderson
2014-04-11 12:34 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 21/26] tcg-aarch64: Introduce tcg_out_insn_3507 Richard Henderson
2014-04-09 12:54 ` Claudio Fontana
2014-04-09 17:17 ` Richard Henderson
2014-04-11 12:36 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 22/26] tcg-aarch64: Merge aarch64_ldst_get_data/type into tcg_out_op Richard Henderson
2014-04-11 12:34 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 23/26] tcg-aarch64: Replace aarch64_ldst_op_data with TCGMemOp Richard Henderson
2014-04-11 12:35 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 24/26] tcg-aarch64: Replace aarch64_ldst_op_data with AArch64LdstType Richard Henderson
2014-04-07 11:45 ` Claudio Fontana
2014-04-07 14:31 ` Richard Henderson
2014-04-11 12:35 ` Claudio Fontana
2014-04-07 18:34 ` [Qemu-devel] [PATCH 27/26] tcg-aarch64: Introduce tcg_out_insn_3312, _3310, _3313 Richard Henderson
2014-04-08 9:00 ` Claudio Fontana
2014-04-11 12:36 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 25/26] tcg-aarch64: Prefer unsigned offsets before signed offsets for ldst Richard Henderson
2014-04-11 12:35 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 26/26] tcg-aarch64: Use tcg_out_mov in preference to tcg_out_movr Richard Henderson
2014-04-11 12:36 ` Claudio Fontana
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