From: Stefan Weil <sw@weilnetz.de>
To: Vincent Palatin <vpalatin@chromium.org>,
qemu-devel <qemu-devel@nongnu.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v2 0/5] [RFC] Add HAX support
Date: Mon, 14 Nov 2016 13:21:02 +0100 [thread overview]
Message-ID: <534ec708-1466-df02-37f0-14df6aba2fd0@weilnetz.de> (raw)
In-Reply-To: <cover.1478863621.git.vpalatin@chromium.org>
Am 11.11.2016 um 12:28 schrieb Vincent Palatin:
> I took a stab at trying to rebase/upstream the support for Intel HAXM.
> (Hardware Accelerated Execution Manager).
> Intel HAX is kernel-based hardware acceleration module for Windows and MacOSX.
>
> I have based my work on the last version of the source code I found:
> the emu-2.2-release branch in the external/qemu-android repository as used by
> the Android emulator.
> In patch 2/5, I have forward-ported the core HAX code mostly unmodified from
> there, I just did some minor touch up to make it build and run properly,
> and fixed the style issues to go through checkpatch.pl.
> I have not included the Darwin support.
> It might contain some outdated constructs and probably requires more
> attention (thus the 'RFC' for this patchset).
>
> In patch 3/5, I'm removing a good chunk of the support for CPUs without UG mode
> as advised by Paolo to simplify the initial version.
>
> In patch 5/5, I have put the plumbing into the QEMU code base, I did some clean
> up there and it is reasonably intrusive: i.e.
> Makefile.target | 1 +
> configure | 18 ++++++++++
> cpus.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++-
> exec.c | 16 +++++++++
> hw/intc/apic_common.c | 3 +-
> include/qom/cpu.h | 5 +++
> include/sysemu/hw_accel.h | 9 +++++
> qemu-options.hx | 11 ++++++
> target-i386/Makefile.objs | 7 ++++
> vl.c | 15 ++++++--
> 10 files changed, 167 insertions(+), 5 deletions(-)
>
> The qemu_cpu_kick_thread mess in cpus.c is probably still not perfact though.
>
> The patch 1/5 just extracts from KVM specific header the cpu_synchronize_
> functions that HAX is also using.
>
> I have tested the end result on a Windows 10 Pro machine (with UG support)
> with the Intel HAXM module 6.0.4 and a large ChromiumOS x86_64 image to
> exercise various code paths. It looks stable.
> I also did a quick regression testing of the integration by running a Linux
> build with KVM enabled.
A full build for Windows needs the patch below to
fix missing declarations, otherwise it fails with
compiler warnings and linker errors.
Stefan
>From 91481639a1005ed3278eb55c77c99bb1bcc135ce Mon Sep 17 00:00:00 2001
From: Stefan Weil <sw@weilnetz.de>
Date: Mon, 14 Nov 2016 13:09:53 +0100
Subject: [PATCH] Fix include statements for HAXM support
We need sysemu/hw_accel.h. As sysemu/hw_accel.h already includes
sysemu/kvm.h, that one can be removed.
Signed-off-by: Stefan Weil <sw@weilnetz.de>
---
hw/ppc/pnv_xscom.c | 2 +-
hw/ppc/ppce500_spin.c | 4 ++--
hw/ppc/spapr.c | 2 +-
hw/ppc/spapr_hcall.c | 2 +-
hw/s390x/s390-pci-inst.c | 1 +
target-ppc/mmu-hash64.c | 2 +-
target-ppc/translate_init.c | 2 +-
target-s390x/gdbstub.c | 1 +
8 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
index 5aaa264..abcb85d 100644
--- a/hw/ppc/pnv_xscom.c
+++ b/hw/ppc/pnv_xscom.c
@@ -20,7 +20,7 @@
#include "qapi/error.h"
#include "hw/hw.h"
#include "qemu/log.h"
-#include "sysemu/kvm.h"
+#include "sysemu/hw_accel.h"
#include "target-ppc/cpu.h"
#include "hw/sysbus.h"
diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c
index cf958a9..eb219ab 100644
--- a/hw/ppc/ppce500_spin.c
+++ b/hw/ppc/ppce500_spin.c
@@ -29,9 +29,9 @@
#include "qemu/osdep.h"
#include "hw/hw.h"
-#include "sysemu/sysemu.h"
#include "hw/sysbus.h"
-#include "sysemu/kvm.h"
+#include "sysemu/hw_accel.h"
+#include "sysemu/sysemu.h"
#include "e500.h"
#define MAX_CPUS 32
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 0cbab24..174f4d3 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -36,7 +36,7 @@
#include "sysemu/device_tree.h"
#include "sysemu/block-backend.h"
#include "sysemu/cpus.h"
-#include "sysemu/kvm.h"
+#include "sysemu/hw_accel.h"
#include "kvm_ppc.h"
#include "migration/migration.h"
#include "mmu-hash64.h"
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 9a9bedf..b2a8e48 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -1,5 +1,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "sysemu/hw_accel.h"
#include "sysemu/sysemu.h"
#include "qemu/log.h"
#include "cpu.h"
@@ -9,7 +10,6 @@
#include "mmu-hash64.h"
#include "cpu-models.h"
#include "trace.h"
-#include "sysemu/kvm.h"
#include "kvm_ppc.h"
#include "hw/ppc/spapr_ovec.h"
diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c
index 0864d9b..4d0775c 100644
--- a/hw/s390x/s390-pci-inst.c
+++ b/hw/s390x/s390-pci-inst.c
@@ -18,6 +18,7 @@
#include "s390-pci-bus.h"
#include "exec/memory-internal.h"
#include "qemu/error-report.h"
+#include "sysemu/hw_accel.h"
/* #define DEBUG_S390PCI_INST */
#ifdef DEBUG_S390PCI_INST
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index fdb7a78..0efc8c6 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -23,7 +23,7 @@
#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#include "qemu/error-report.h"
-#include "sysemu/kvm.h"
+#include "sysemu/hw_accel.h"
#include "kvm_ppc.h"
#include "mmu-hash64.h"
#include "exec/log.h"
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 208fa1e..1a049af 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -21,10 +21,10 @@
#include "qemu/osdep.h"
#include "disas/bfd.h"
#include "exec/gdbstub.h"
-#include "sysemu/kvm.h"
#include "kvm_ppc.h"
#include "sysemu/arch_init.h"
#include "sysemu/cpus.h"
+#include "sysemu/hw_accel.h"
#include "cpu-models.h"
#include "mmu-hash32.h"
#include "mmu-hash64.h"
diff --git a/target-s390x/gdbstub.c b/target-s390x/gdbstub.c
index 3d223de..3c652fb 100644
--- a/target-s390x/gdbstub.c
+++ b/target-s390x/gdbstub.c
@@ -23,6 +23,7 @@
#include "exec/exec-all.h"
#include "exec/gdbstub.h"
#include "qemu/bitops.h"
+#include "sysemu/hw_accel.h"
int s390_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
{
--
2.10.2
next prev parent reply other threads:[~2016-11-14 12:21 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-11 11:28 [Qemu-devel] [PATCH v2 0/5] [RFC] Add HAX support Vincent Palatin
2016-11-11 11:28 ` [Qemu-devel] [PATCH v2 1/5] kvm: move cpu synchronization code Vincent Palatin
2016-11-11 11:28 ` [Qemu-devel] [PATCH v2 2/5] target-i386: Add Intel HAX files Vincent Palatin
2016-11-14 9:29 ` Stefan Weil
2016-11-14 9:38 ` Vincent Palatin
2016-11-14 10:15 ` Paolo Bonzini
2016-11-14 12:07 ` Vincent Palatin
2016-11-14 11:55 ` Paolo Bonzini
2016-11-11 11:28 ` [Qemu-devel] [PATCH v2 3/5] hax: remove non UG code Vincent Palatin
2016-11-11 11:28 ` [Qemu-devel] [PATCH v2 4/5] hax: simplify init Vincent Palatin
2016-11-11 11:28 ` [Qemu-devel] [PATCH v2 5/5] Plumb the HAXM-based hardware acceleration support Vincent Palatin
2016-11-14 11:56 ` Paolo Bonzini
2016-11-14 12:09 ` Vincent Palatin
2016-11-13 3:20 ` [Qemu-devel] [PATCH v2 0/5] [RFC] Add HAX support no-reply
2016-11-14 8:21 ` Vincent Palatin
2016-11-14 8:47 ` Paolo Bonzini
2016-11-14 8:55 ` Stefan Weil
2016-11-14 9:28 ` Vincent Palatin
2016-11-14 12:21 ` Stefan Weil [this message]
2016-11-14 12:33 ` Vincent Palatin
2016-11-14 12:38 ` Stefan Weil
2016-11-14 12:36 ` Stefan Weil
2016-11-14 13:09 ` Vincent Palatin
2016-11-17 11:09 ` Vincent Palatin
2016-11-18 10:42 ` Vincent Palatin
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