From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56747) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wi1We-0007cJ-8E for qemu-devel@nongnu.org; Wed, 07 May 2014 09:04:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Wi1WZ-0005jZ-6a for qemu-devel@nongnu.org; Wed, 07 May 2014 09:04:44 -0400 Message-ID: <536A2F65.9020700@suse.de> Date: Wed, 07 May 2014 15:04:37 +0200 From: Alexander Graf MIME-Version: 1.0 References: <20140505074816.25523.71374.stgit@bahia.local> <20140505080520.25523.44406.stgit@bahia.local> <20140507101443.146fc26d@bahia.local> <5369F864.7040406@suse.de> <8EFC6697-F364-41B3-9097-ED5529292105@suse.de> <20140507121924.3503e110@bahia.local> <536A1EFC.4060405@suse.de> <20140507144023.690673b0@bahia.local> In-Reply-To: <20140507144023.690673b0@bahia.local> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v3 3/4] target-ppc: ppc can be either endian List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Greg Kurz Cc: Peter Maydell , Marc Zyngier , Rusty Russell , QEMU Developers , "qemu-ppc@nongnu.org" , "bharata@linux.vnet.ibm.com" , =?ISO-8859-1?Q?Andreas_F=E4?= =?ISO-8859-1?Q?rber?= On 05/07/2014 02:40 PM, Greg Kurz wrote: > On Wed, 07 May 2014 13:54:36 +0200 > Alexander Graf wrote: >> On 05/07/2014 12:19 PM, Greg Kurz wrote: >>> On Wed, 7 May 2014 11:41:10 +0200 >>> Alexander Graf wrote: >>> >>>>> Am 07.05.2014 um 11:26 schrieb Peter Maydell : >>>>> >>>>>> On 7 May 2014 10:09, Alexander Graf wrote: >>>>>> I don't think we should overengineer hacks for legacy virtio. >>>>> Agreed. So what's our final conclusion: virtio endianness >>>>> is the endianness of the guest kernel at the point where >>>>> it triggers a reset of the virtio device, yes? >>>> I just realized we're talking about virtio in a non-virtio thread. This patch set is about core dump support which is different from virtio bi-endian support. While both may end up at the same logic, I don't like the idea to mix them. This function is PPC internal. >>>> >>>> Alex >>>> >>> Correct and now I have this feeling about using LPCR_ILE versus MSR_LE... >>> >>> LPCR_ILE reflects the interrupt vector endianness. It is set during early boot >>> by the guest kernel according to the desired endianness. MSR_LE gives the >>> current endian mode for the cpu. >>> >>> The idea is that you need to rely on LPCR_ILE when you peek from the host >>> because you lack context and MSR_LE may be have been temporarily changed. >>> This is clearly the case for dump support. >>> >>> Now when it comes to virtio, we cache the endianness at device reset time: MSR_LE from >>> current_cpu should reflect the guest kernel endianness, no ? >>> >>> In this case we could end up like what's being currently discussed with ARM: >>> >>> http://www.spinics.net/lists/kvm-arm/msg09099.html >>> http://www.spinics.net/lists/kvm-arm/msg09091.html >>> >>> Alex, >>> >>> If we agree that current_cpu->MSR_LE does the job when the guest kernel resets >>> the device, then I guess we don't even need this patch... >> Either one works for me as long as we put it into a spec. No solution >> will be able to fulfill all cases. >> >> The uglyness about the current_cpu bit is that devices are usually not >> supposed to know about the cpu accesses come from usually. But then >> again devices shouldn't know about the endianness of a cpu either so I >> guess it's ok to breach layers here. >> >> Rusty, do you have strong feelings either way? >> >> >> Alex >> > Coming back to the initial subject. What about changing the last sentence > in the commit message to the following ? > > "And when it comes to dumping a guest, the information is needed to write > ELF headers using the kernel endianness." > > This would make the patch a PPC64 dump only business and end the debate. :) > > Tell me if you want me to repost. Let's wait for Tom's ack first - or if you can show me that you fully grasped that we're doing the "right thing" in all host/guest big/little combinations with AVX registers I'm happy too :) Alex