From: Paolo Bonzini <pbonzini@redhat.com>
To: Gerd Hoffmann <kraxel@redhat.com>, qemu-devel <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] qtest and pci mmio?
Date: Wed, 07 May 2014 18:41:40 +0200 [thread overview]
Message-ID: <536A6244.3010000@redhat.com> (raw)
In-Reply-To: <1399478797.25347.6.camel@nilsson.home.kraxel.org>
Il 07/05/2014 18:06, Gerd Hoffmann ha scritto:
> Hi,
>
> Trying to add something real to the new ehci test. Having trouble
> accessing the ehci mmio registers. uhci io registers are working fine.
> Current patch attached, which just does a register dump to stderr. uhci
> looks sane. ehci shouldn't be all zeros. Anyone has a clue?
>
> thanks,
> Gerd
>
diff --git a/tests/libqos/pci.c b/tests/libqos/pci.c
index 7e0907b..c9a0b91 100644
--- a/tests/libqos/pci.c
+++ b/tests/libqos/pci.c
@@ -103,7 +103,7 @@ void qpci_config_writew(QPCIDevice *dev, uint8_t offset, uint16_t value)
void qpci_config_writel(QPCIDevice *dev, uint8_t offset, uint32_t value)
{
- dev->bus->config_writew(dev->bus, dev->devfn, offset, value);
+ dev->bus->config_writel(dev->bus, dev->devfn, offset, value);
}
This should help. :)
Re. how to find it, I modified the -qtest-log option to use /dev/tty instead of
/dev/null (there was a patch to add a QTEST_LOG environment variable...), and
the BAR sizing looked a bit suspicious:
[R +0.023561] outl 0xcf8 0x8000ef10
[S +0.023567] OK
[R +0.023584] outw 0xcfc 0xffff
[S +0.024013] OK
[R +0.024036] outl 0xcf8 0x8000ef10
[S +0.024043] OK
[R +0.024061] inl 0xcfc
[S +0.024068] OK 0xf000
[R +0.024086] outl 0xcf8 0x8000ef10
[S +0.024093] OK
[R +0.024110] outw 0xcfc 0x0
[S +0.024519] OK
Paolo
prev parent reply other threads:[~2014-05-07 16:42 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-07 16:06 [Qemu-devel] qtest and pci mmio? Gerd Hoffmann
2014-05-07 16:41 ` Paolo Bonzini [this message]
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