From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38545) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wi5CN-0007HN-ME for qemu-devel@nongnu.org; Wed, 07 May 2014 13:00:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Wi5CF-0008JY-B0 for qemu-devel@nongnu.org; Wed, 07 May 2014 13:00:03 -0400 Received: from cantor2.suse.de ([195.135.220.15]:35556 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wi5C9-0008Iy-A8 for qemu-devel@nongnu.org; Wed, 07 May 2014 12:59:55 -0400 Message-ID: <536A6683.2070500@suse.de> Date: Wed, 07 May 2014 18:59:47 +0200 From: Alexander Graf MIME-Version: 1.0 References: <5368D385.7050900@gmail.com> <536A51C9.6060308@gmail.com> In-Reply-To: <536A51C9.6060308@gmail.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] Help needed testing on ppc List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Tom Musta Cc: qemu-devel@nongnu.org On 05/07/2014 05:31 PM, Tom Musta wrote: > On 5/6/2014 6:17 PM, BALATON Zoltan wrote: >> On Tue, 6 May 2014, Tom Musta wrote: >>> On 5/6/2014 5:03 AM, BALATON Zoltan wrote: >>>> I'd appreciate some insight and help. > [snip] >>> (1) Why is MorphOS using this invalid instruction form? Would it be easier to fix the OS rather than QEMU? >> I don't know why is it used. I can ask the MorphOS developers but they did not seem to be too supportive so far and at least one of them expressed that they have no interest supporting other than their officially supported list of hardware at this time. So >> I assume it is easier to fix QEMU than MorphOS and if it works on a real Mac then it should also work on QEMU's emulation of that Mac hardware. >> >>> Is there some undocumented processor behavior that the code is dependent upon (e.g. is it actually expected CR0 to be set?). >> This is what the testing was supposed to find out but MorphOS seems to run better with the quoted patch so I don't think it depends on any other undocumented behaviour other than ignoring reserved bits but I have no definitive answer. >> > It still seems to me that setting a reserved instruction bit is an strange thing to do. It would be nice to at least > have a justification from MorphOS. It is possible that no one even knows the answer. > >>> (2) Your patch makes some store instructions compliant with the most recent ISAs but there are many other instructions that are not addressed by the patch. I think fixing only some will be a future source of confusion.>> > Alex: do you have an opinion on this? Are you OK with changing masks for a few stores but not all instructions in general? I would like to see someone just test all those load/store instructions on old CPUs and see whether they fault. If none faults, we should just be consistent and remove them for all. If say a 750 really only ignores the Rc bit for stwx for some reason we should just model it accordingly. Alex